Difference between revisions of "Extend IOP16 minimal example"
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== Clone Sources == | == Clone Sources == | ||
− | + | Clone the two repositories to the same directory level since relative paths are used for source files | |
− | + | ||
− | + | * [https://github.com/douggilliland/IOP16 IOP16 GitHub repository] | |
+ | * [https://github.com/douggilliland/Design_A_CPU Design a CPU GitHub repository] | ||
== Build Minimal Example == | == Build Minimal Example == |
Revision as of 10:52, 11 April 2022
Contents
Overview
- This is a guide to extending the minimal IOP example by adding IOP16 Peripherals to the minimal design
- This is not the same as Embedding the IOP16 into another design
- This guide requires general familiarity with IOP16 16-bit I/O CPU Design
Clone Sources
Clone the two repositories to the same directory level since relative paths are used for source files
Build Minimal Example
- Start by building the minimal example in Quartus II
- Adjust I/O pins as required for the FPGA that is being used
- This example does not cover porting to a different FPGA card
- May need to re-point to the ROM .MIF file since Quartus II sometimes "forgets"
- Adjust I/O pins as required for the FPGA that is being used
Steps
- Copy baseline design
- Select/add peripherals
- Create new peripherals
- Write assembly code
Baseline Design
- Starts from IOP example
- Similar to Arduino "Blink Sketch" and uses the resources
- Timer Unit 0 1 second timer
- On-board LED
- The Timer unit could be removed if desired
- Timer makes Blink easier
- Similar to Arduino "Blink Sketch" and uses the resources
- Copy the minimal design to a new folder