Difference between revisions of "PDP-11 ON RETRO-EP4CE15"

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== Pin List ==
 
== Pin List ==
 +
 +
{| class="wikitable"
 +
! To
 +
! Direction
 +
! Location
 +
! I/O Standard
 +
! Pull-Up
 +
|-
 +
| clkin
 +
| Input
 +
| PIN_M9
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| cts1
 +
| Input
 +
| PIN_B11
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_addr[0]
 +
| Output
 +
| PIN_P8
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_addr[1]
 +
| Output
 +
| PIN_P7
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_addr[10]
 +
| Output
 +
| PIN_R6
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_addr[11]
 +
| Output
 +
| PIN_T9
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_addr[12]
 +
| Output
 +
| PIN_Y9
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_addr[2]
 +
| Output
 +
| PIN_N8
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_addr[3]
 +
| Output
 +
| PIN_N6
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_addr[4]
 +
| Output
 +
| PIN_U6
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_addr[5]
 +
| Output
 +
| PIN_U7
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_addr[6]
 +
| Output
 +
| PIN_V6
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_addr[7]
 +
| Output
 +
| PIN_U8
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_addr[8]
 +
| Output
 +
| PIN_T8
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_addr[9]
 +
| Output
 +
| PIN_W8
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_ba_0
 +
| Output
 +
| PIN_T7
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_ba_1
 +
| Output
 +
| PIN_P9
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_cas_n
 +
| Output
 +
| PIN_AA7
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_cke
 +
| Output
 +
| PIN_V9
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_clk
 +
| Output
 +
| PIN_AB11
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_cs_n
 +
| Output
 +
| PIN_AB5
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[0]
 +
| Bidir
 +
| PIN_AA12
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[1]
 +
| Bidir
 +
| PIN_Y11
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[10]
 +
| Bidir
 +
| PIN_U11
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[11]
 +
| Bidir
 +
| PIN_R10
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[12]
 +
| Bidir
 +
| PIN_R11
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[13]
 +
| Bidir
 +
| PIN_U12
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[14]
 +
| Bidir
 +
| PIN_R12
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[15]
 +
| Bidir
 +
| PIN_P12
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[2]
 +
| Bidir
 +
| PIN_AA10
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[3]
 +
| Bidir
 +
| PIN_AB10
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[4]
 +
| Bidir
 +
| PIN_Y10
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[5]
 +
| Bidir
 +
| PIN_AA9
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[6]
 +
| Bidir
 +
| PIN_AB8
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[7]
 +
| Bidir
 +
| PIN_AA8
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[8]
 +
| Bidir
 +
| PIN_U10
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_dq[9]
 +
| Bidir
 +
| PIN_T10
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_ldqm
 +
| Output
 +
| PIN_AB7
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_ras_n
 +
| Output
 +
| PIN_AB6
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_udqm
 +
| Output
 +
| PIN_V10
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| dram_we_n
 +
| Output
 +
| PIN_W9
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_PB[1]
 +
| Input
 +
| PIN_W19
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_PB[2]
 +
| Input
 +
| PIN_U21
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_PB[3]
 +
| Input
 +
| PIN_R21
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_PB[4]
 +
| Input
 +
| PIN_T20
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_PB[5]
 +
| Input
 +
| PIN_N21
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_PB[6]
 +
| Input
 +
| PIN_M21
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_PB[7]
 +
| Input
 +
| PIN_L19
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_PB[8]
 +
| Input
 +
| PIN_M22
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_SS[1]
 +
| Input
 +
| PIN_V21
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_SS[2]
 +
| Input
 +
| PIN_V20
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_SS[3]
 +
| Input
 +
| PIN_T22
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_SS[4]
 +
| Input
 +
| PIN_P22
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_SS[5]
 +
| Input
 +
| PIN_P17
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_SS[6]
 +
| Input
 +
| PIN_N20
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_SS[7]
 +
| Input
 +
| PIN_N19
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| i_SS[8]
 +
| Input
 +
| PIN_L18
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| o_LED[1]
 +
| Output
 +
| PIN_U22
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| o_LED[2]
 +
| Output
 +
| PIN_U20
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| o_LED[3]
 +
| Output
 +
| PIN_R22
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| o_LED[4]
 +
| Output
 +
| PIN_T19
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| o_LED[5]
 +
| Output
 +
| PIN_P16
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| o_LED[6]
 +
| Output
 +
| PIN_M20
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| o_LED[7]
 +
| Output
 +
| PIN_M18
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| o_LED[8]
 +
| Output
 +
| PIN_L22
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| ps2k_c
 +
| Input
 +
| PIN_AA2
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| ps2k_d
 +
| Input
 +
| PIN_AA1
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| rts1
 +
| Output
 +
| PIN_F10
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| rx1
 +
| Input
 +
| PIN_C11
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| sdcard_cs
 +
| Output
 +
| PIN_B15
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| sdcard_miso
 +
| Input
 +
| PIN_B16
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| sdcard_mosi
 +
| Output
 +
| PIN_C15
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| sdcard_sclk
 +
| Output
 +
| PIN_C16
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| tx1
 +
| Output
 +
| PIN_G10
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| vgab[0]
 +
| Output
 +
| PIN_B13
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| vgab[1]
 +
| Output
 +
| PIN_A13
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| vgag[0]
 +
| Output
 +
| PIN_D13
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| vgag[1]
 +
| Output
 +
| PIN_C13
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| vgah
 +
| Output
 +
| PIN_A15
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| vgar[0]
 +
| Output
 +
| PIN_E12
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| vgar[1]
 +
| Output
 +
| PIN_D12
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| vgav
 +
| Output
 +
| PIN_A14
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| xu_cs
 +
| Output
 +
|
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| xu_debug_tx
 +
| Output
 +
|
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| xu_miso
 +
| Input
 +
|
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| xu_mosi
 +
| Output
 +
|
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
| xu_sclk
 +
| Output
 +
|
 +
| 3.3-V LVTTL
 +
|
 +
|-
 +
|}
 +
 +
* pins
  
 
{| class="wikitable"
 
{| class="wikitable"

Revision as of 11:40, 19 April 2022

PDP-11 FrontPanel P512-cropped-720px.jpg

Build

FPGA Hardware

RETROEP4CE15 REV4 P376-annotated-720px.jpg

Front Panel

PDP2011 FPGA Builds

Disks (SD card images) that work with PDP2011 build

Other PDP2011 Builds

Software

Disk Images

Documentation

Switches

PDP-11 FrontPanel P512-cropped-720px.jpg

Function Marking 5CEFA2 FPGA Pin
resetbtn pushbutton PB8 PIN_M22
PWR LED D8 PIN_L22
sdHC LED D7 PIN_M18
FETch LED D6 PIN_M20
sdWR LED D5 PIN_P16
sdRD LED D4 PIN_T19
RH Drive (rp) LED D3 PIN_R22
RK Drive LED D2 PIN_U20
RL Drive LED D1 PIN_U22
K11 (tty1) Slide switch SS4 PIN_P22
RH Drive (rp) (UP) Slide switch SS3 PIN_T22
RK Drive (UP) Slide switch SS2 PIN_V20
RL Drive (UP) Slide switch SS1 PIN_V21

Connectors

P1 - VGA (5CEFA2F23 Card)

  • videoR0 = U8-49 = PIN_E12
  • videoR1 = U8-50 = PIN_D12
  • videoG0 = U8-51 = PIN_D13
  • videoG1 = U8-52 = PIN_C13
  • videoB0 = U8-53 = PIN_B13
  • videoB1 = U8-54 = PIN_A13
  • hSync = U8-55 = PIN_A15
  • vSync = U8-56 = PIN_A14

P2 - PS/2 Keyboard

PS2 Mapping.PNG

  • PS2DAT = U7-8 = PIN_BANK_2A_AA1
  • PS2CLK = U7-8 = PIN_NANK_2A_AA2

P3 - Serial Ports - I/O connector

  • fpgaRx1 (in) = PIN_C11
    • Needs weak pullup
      • set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to rxd1
  • fpgaTx1 (out) = PIN_G10
  • fpgaRts1 = U7-44 = PIN_F10
  • fpgaCts1 = U7-46 = PIN_B11

IO conn

  • Second serial port on I/O connector
  • rx2 (in) = PIN_M18
  • tx2 (out) = PIN_L19
  • rts2 (out) = PIN_N19
  • cts2 (in) = PIN_M21

P4 - SD Card (5CEFA2F23 FPGA pin numbers)

  • This build only works with SD Cards, not SD/HC or other newer cards.
  • These cards are 1 GB or 2 GB in size.

RETROEP4CE15-P4 SD Card.PNG

  • SDCS = U7-57 = PIN_BANK_7A_B15
  • MOSI = U7-58 = PIN_BANK_7A_C15
  • SCK = U7-59 = PIN_BANK_7A_C16
  • MISO = U7-60 = PIN_BANK_7A_B16
  • SD_DETECT - PIN_B12

J1 - I/O Connector (5CEFA2F23 FPGA Card pin numbers)

  • LEDS-SWITCHES-2 Card wired to RETRO-EP4CE15 Card
  • Wiring "flipped" and directly in order
    • Note extra ground/power pins on the Front Panel card

LEDS-SWITCHES-2 P1 FPGA Pinout.PNG

Pin List for 5CEFA2F23I7 FPGA on RETRO-EP4CE15 Card

J4 - USB-B B (5CEFA2F23 FPGA Card pin numbers) Serial Port

  • On-board FT230X FTDI USB to Serial

RETROEP4CE15-Serial.PNG

Resources

Programming the FPGA EEPROM (5CEFA2F23 FPGA)

  • File
  • Convert Programming File
  • Configuration Device = MT25QL128
  • Mode = Active Serial
  • Programming File Type: *.jic
  • Advanced = Check both Disables...
  • Select Flash Loader
  • Add Device = Cyclone V and 5CEFA2
  • Select SOF Data
  • Select Add File and select the .sof file
  • Generate
  • In Tools, Programmer
  • Mode: JTAG
  • Add file and select the .jic file
  • Select Program/Configure
  • Takes a while to program
  • Press button near VGA

Pin List

To Direction Location I/O Standard Pull-Up
clkin Input PIN_M9 3.3-V LVTTL
cts1 Input PIN_B11 3.3-V LVTTL
dram_addr[0] Output PIN_P8 3.3-V LVTTL
dram_addr[1] Output PIN_P7 3.3-V LVTTL
dram_addr[10] Output PIN_R6 3.3-V LVTTL
dram_addr[11] Output PIN_T9 3.3-V LVTTL
dram_addr[12] Output PIN_Y9 3.3-V LVTTL
dram_addr[2] Output PIN_N8 3.3-V LVTTL
dram_addr[3] Output PIN_N6 3.3-V LVTTL
dram_addr[4] Output PIN_U6 3.3-V LVTTL
dram_addr[5] Output PIN_U7 3.3-V LVTTL
dram_addr[6] Output PIN_V6 3.3-V LVTTL
dram_addr[7] Output PIN_U8 3.3-V LVTTL
dram_addr[8] Output PIN_T8 3.3-V LVTTL
dram_addr[9] Output PIN_W8 3.3-V LVTTL
dram_ba_0 Output PIN_T7 3.3-V LVTTL
dram_ba_1 Output PIN_P9 3.3-V LVTTL
dram_cas_n Output PIN_AA7 3.3-V LVTTL
dram_cke Output PIN_V9 3.3-V LVTTL
dram_clk Output PIN_AB11 3.3-V LVTTL
dram_cs_n Output PIN_AB5 3.3-V LVTTL
dram_dq[0] Bidir PIN_AA12 3.3-V LVTTL
dram_dq[1] Bidir PIN_Y11 3.3-V LVTTL
dram_dq[10] Bidir PIN_U11 3.3-V LVTTL
dram_dq[11] Bidir PIN_R10 3.3-V LVTTL
dram_dq[12] Bidir PIN_R11 3.3-V LVTTL
dram_dq[13] Bidir PIN_U12 3.3-V LVTTL
dram_dq[14] Bidir PIN_R12 3.3-V LVTTL
dram_dq[15] Bidir PIN_P12 3.3-V LVTTL
dram_dq[2] Bidir PIN_AA10 3.3-V LVTTL
dram_dq[3] Bidir PIN_AB10 3.3-V LVTTL
dram_dq[4] Bidir PIN_Y10 3.3-V LVTTL
dram_dq[5] Bidir PIN_AA9 3.3-V LVTTL
dram_dq[6] Bidir PIN_AB8 3.3-V LVTTL
dram_dq[7] Bidir PIN_AA8 3.3-V LVTTL
dram_dq[8] Bidir PIN_U10 3.3-V LVTTL
dram_dq[9] Bidir PIN_T10 3.3-V LVTTL
dram_ldqm Output PIN_AB7 3.3-V LVTTL
dram_ras_n Output PIN_AB6 3.3-V LVTTL
dram_udqm Output PIN_V10 3.3-V LVTTL
dram_we_n Output PIN_W9 3.3-V LVTTL
i_PB[1] Input PIN_W19 3.3-V LVTTL
i_PB[2] Input PIN_U21 3.3-V LVTTL
i_PB[3] Input PIN_R21 3.3-V LVTTL
i_PB[4] Input PIN_T20 3.3-V LVTTL
i_PB[5] Input PIN_N21 3.3-V LVTTL
i_PB[6] Input PIN_M21 3.3-V LVTTL
i_PB[7] Input PIN_L19 3.3-V LVTTL
i_PB[8] Input PIN_M22 3.3-V LVTTL
i_SS[1] Input PIN_V21 3.3-V LVTTL
i_SS[2] Input PIN_V20 3.3-V LVTTL
i_SS[3] Input PIN_T22 3.3-V LVTTL
i_SS[4] Input PIN_P22 3.3-V LVTTL
i_SS[5] Input PIN_P17 3.3-V LVTTL
i_SS[6] Input PIN_N20 3.3-V LVTTL
i_SS[7] Input PIN_N19 3.3-V LVTTL
i_SS[8] Input PIN_L18 3.3-V LVTTL
o_LED[1] Output PIN_U22 3.3-V LVTTL
o_LED[2] Output PIN_U20 3.3-V LVTTL
o_LED[3] Output PIN_R22 3.3-V LVTTL
o_LED[4] Output PIN_T19 3.3-V LVTTL
o_LED[5] Output PIN_P16 3.3-V LVTTL
o_LED[6] Output PIN_M20 3.3-V LVTTL
o_LED[7] Output PIN_M18 3.3-V LVTTL
o_LED[8] Output PIN_L22 3.3-V LVTTL
ps2k_c Input PIN_AA2 3.3-V LVTTL
ps2k_d Input PIN_AA1 3.3-V LVTTL
rts1 Output PIN_F10 3.3-V LVTTL
rx1 Input PIN_C11 3.3-V LVTTL
sdcard_cs Output PIN_B15 3.3-V LVTTL
sdcard_miso Input PIN_B16 3.3-V LVTTL
sdcard_mosi Output PIN_C15 3.3-V LVTTL
sdcard_sclk Output PIN_C16 3.3-V LVTTL
tx1 Output PIN_G10 3.3-V LVTTL
vgab[0] Output PIN_B13 3.3-V LVTTL
vgab[1] Output PIN_A13 3.3-V LVTTL
vgag[0] Output PIN_D13 3.3-V LVTTL
vgag[1] Output PIN_C13 3.3-V LVTTL
vgah Output PIN_A15 3.3-V LVTTL
vgar[0] Output PIN_E12 3.3-V LVTTL
vgar[1] Output PIN_D12 3.3-V LVTTL
vgav Output PIN_A14 3.3-V LVTTL
xu_cs Output 3.3-V LVTTL
xu_debug_tx Output 3.3-V LVTTL
xu_miso Input 3.3-V LVTTL
xu_mosi Output 3.3-V LVTTL
xu_sclk Output 3.3-V LVTTL
  • pins
To Direction Location I/O Standard Pull-Up
clkin Input PIN_M9 3.3-V LVTTL
cts1 Input PIN_N19 3.3-V LVTTL
dram_addr[12] Output PIN_Y9 3.3-V LVTTL
dram_addr[11] Output PIN_T9 3.3-V LVTTL
dram_addr[10] Output PIN_R6 3.3-V LVTTL
dram_addr[9] Output PIN_W8 3.3-V LVTTL
dram_addr[8] Output PIN_T8 3.3-V LVTTL
dram_addr[7] Output PIN_U8 3.3-V LVTTL
dram_addr[6] Output PIN_V6 3.3-V LVTTL
dram_addr[5] Output PIN_U7 3.3-V LVTTL
dram_addr[4] Output PIN_U6 3.3-V LVTTL
dram_addr[3] Output PIN_N6 3.3-V LVTTL
dram_addr[2] Output PIN_N8 3.3-V LVTTL
dram_addr[1] Output PIN_P7 3.3-V LVTTL
dram_addr[0] Output PIN_P8 3.3-V LVTTL
dram_ba_0 Output PIN_T7 3.3-V LVTTL
dram_ba_1 Output PIN_P9 3.3-V LVTTL
dram_cas_n Output PIN_AA7 3.3-V LVTTL
dram_cke Output PIN_V9 3.3-V LVTTL
dram_clk Output PIN_AB11 3.3-V LVTTL
dram_cs_n Output PIN_AB5 3.3-V LVTTL
dram_dq[15] Bidir PIN_P12 3.3-V LVTTL
dram_dq[14] Bidir PIN_R12 3.3-V LVTTL
dram_dq[13] Bidir PIN_U12 3.3-V LVTTL
dram_dq[12] Bidir PIN_R11 3.3-V LVTTL
dram_dq[11] Bidir PIN_R10 3.3-V LVTTL
dram_dq[10] Bidir PIN_U11 3.3-V LVTTL
dram_dq[9] Bidir PIN_T10 3.3-V LVTTL
dram_dq[8] Bidir PIN_U10 3.3-V LVTTL
dram_dq[7] Bidir PIN_AA8 3.3-V LVTTL
dram_dq[6] Bidir PIN_AB8 3.3-V LVTTL
dram_dq[5] Bidir PIN_AA9 3.3-V LVTTL
dram_dq[4] Bidir PIN_Y10 3.3-V LVTTL
dram_dq[3] Bidir PIN_AB10 3.3-V LVTTL
dram_dq[2] Bidir PIN_AA10 3.3-V LVTTL
dram_dq[1] Bidir PIN_Y11 3.3-V LVTTL
dram_dq[0] Bidir PIN_AA12 3.3-V LVTTL
dram_ldqm Output PIN_AB7 3.3-V LVTTL
dram_ras_n Output PIN_AB6 3.3-V LVTTL
dram_udqm Output PIN_V10 3.3-V LVTTL
dram_we_n Output PIN_W9 3.3-V LVTTL
greenled[4] Output PIN_U20 3.3-V LVTTL
greenled[3] Output PIN_R22 3.3-V LVTTL
greenled[2] Output PIN_T22 3.3-V LVTTL
greenled[1] Output PIN_P22 3.3-V LVTTL
greenled[0] Output PIN_R21 3.3-V LVTTL
ps2k_c Input PIN_AA2 3.3-V LVTTL
ps2k_d Input PIN_AA1 3.3-V LVTTL
resetbtn Input PIN_M22 3.3-V LVTTL on
rts1 Output PIN_M18 3.3-V LVTTL
rx1 Input PIN_L19 3.3-V LVTTL
sdcard_cs Output PIN_B15 3.3-V LVTTL
sdcard_miso Input PIN_B16 3.3-V LVTTL
sdcard_mosi Output PIN_C15 3.3-V LVTTL
sdcard_sclk Output PIN_C16 3.3-V LVTTL
sw[5] Input PIN_N16 3.3-V LVTTL
sw[4] Input PIN_M16 3.3-V LVTTL
sw[3] Input PIN_K21 3.3-V LVTTL
sw[2] Input PIN_K22 3.3-V LVTTL
sw[1] Input PIN_K17 3.3-V LVTTL
sw[0] Input PIN_L17 3.3-V LVTTL
tx1 Output PIN_L18 3.3-V LVTTL
vgab[1] Output PIN_A13 3.3-V LVTTL
vgab[0] Output PIN_B13 3.3-V LVTTL
vgag[1] Output PIN_C13 3.3-V LVTTL
vgag[0] Output PIN_D13 3.3-V LVTTL
vgah Output PIN_A15 3.3-V LVTTL
vgar[1] Output PIN_D12 3.3-V LVTTL
vgar[0] Output PIN_E12 3.3-V LVTTL
vgav Output PIN_A14 3.3-V LVTTL
xu_cs Output PIN_T20 3.3-V LVTTL
xu_debug_tx Output PIN_P17 3.3-V LVTTL
xu_miso Input PIN_P16 3.3-V LVTTL
xu_mosi Output PIN_N21 3.3-V LVTTL
xu_sclk Output PIN_N20 3.3-V LVTTL


  • List
# LEDS
set_location_assignment PIN_L22 -to o_LED[8]
set_location_assignment PIN_M18 -to o_LED[7]
set_location_assignment PIN_M20 -to o_LED[6]
set_location_assignment PIN_P16 -to o_LED[5]
set_location_assignment PIN_T19 -to o_LED[4]
set_location_assignment PIN_R22 -to o_LED[3]
set_location_assignment PIN_U20 -to o_LED[2]
set_location_assignment PIN_U22 -to o_LED[1]
# PUSHBUTTONS
set_location_assignment PIN_M22 -to i_PB[8]
set_location_assignment PIN_L19 -to i_PB[7]
set_location_assignment PIN_M21 -to i_PB[6]
set_location_assignment PIN_N21 -to i_PB[5]
set_location_assignment PIN_T20 -to i_PB[4]
set_location_assignment PIN_R21 -to i_PB[3]
set_location_assignment PIN_U21 -to i_PB[2]
set_location_assignment PIN_W19 -to i_PB[1]
# SLIDE SWITCHES
set_location_assignment PIN_L18 -to i_SS[8]
set_location_assignment PIN_N19 -to i_SS[7]
set_location_assignment PIN_N20 -to i_SS[6]
set_location_assignment PIN_P17 -to i_SS[5]
set_location_assignment PIN_P22 -to i_SS[4]
set_location_assignment PIN_T22 -to i_SS[3]
set_location_assignment PIN_V20 -to i_SS[2]
set_location_assignment PIN_V21 -to i_SS[1]

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name TOP_LEVEL_ENTITY top
set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "Design Compiler"

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE 5CEFA2F23I7
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON

# Pin & Location Assignments
# ==========================

# Clock and reset
set_location_assignment PIN_M9 -to clkin
set_location_assignment PIN_M22 -to resetbtn
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to resetbtn
# Control switches - Jumpers on front edge
set_location_assignment PIN_L17 -to sw[0]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to sw[0]
set_location_assignment PIN_K17 -to sw[1]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to sw[1]
set_location_assignment PIN_K22 -to sw[2]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to sw[2]
set_location_assignment PIN_K21 -to sw[3]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to sw[3]
set_location_assignment PIN_M16 -to sw[4]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to sw[4]
set_location_assignment PIN_N16 -to sw[5]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to sw[5]
# LEDs
set_location_assignment PIN_R21 -to greenled[0]
set_location_assignment PIN_P22 -to greenled[1]
set_location_assignment PIN_T22 -to greenled[2]
set_location_assignment PIN_R22 -to greenled[3]
set_location_assignment PIN_U20 -to greenled[4]
# SDRAM
set_location_assignment PIN_Y9 -to dram_addr[12]
set_location_assignment PIN_T9 -to dram_addr[11]
set_location_assignment PIN_R6 -to dram_addr[10]
set_location_assignment PIN_W8 -to dram_addr[9]
set_location_assignment PIN_T8 -to dram_addr[8]
set_location_assignment PIN_U8 -to dram_addr[7]
set_location_assignment PIN_V6 -to dram_addr[6]
set_location_assignment PIN_U7 -to dram_addr[5]
set_location_assignment PIN_U6 -to dram_addr[4]
set_location_assignment PIN_N6 -to dram_addr[3]
set_location_assignment PIN_N8 -to dram_addr[2]
set_location_assignment PIN_P7 -to dram_addr[1]
set_location_assignment PIN_P8 -to dram_addr[0]
set_location_assignment PIN_P9 -to dram_ba_1
set_location_assignment PIN_T7 -to dram_ba_0
set_location_assignment PIN_AA7 -to dram_cas_n
set_location_assignment PIN_V9 -to dram_cke
set_location_assignment PIN_AB11 -to dram_clk
set_location_assignment PIN_AB5 -to dram_cs_n
set_location_assignment PIN_P12 -to dram_dq[15]
set_location_assignment PIN_R12 -to dram_dq[14]
set_location_assignment PIN_U12 -to dram_dq[13]
set_location_assignment PIN_R11 -to dram_dq[12]
set_location_assignment PIN_R10 -to dram_dq[11]
set_location_assignment PIN_U11 -to dram_dq[10]
set_location_assignment PIN_T10 -to dram_dq[9]
set_location_assignment PIN_U10 -to dram_dq[8]
set_location_assignment PIN_AA8 -to dram_dq[7]
set_location_assignment PIN_AB8 -to dram_dq[6]
set_location_assignment PIN_AA9 -to dram_dq[5]
set_location_assignment PIN_Y10 -to dram_dq[4]
set_location_assignment PIN_AB10 -to dram_dq[3]
set_location_assignment PIN_AA10 -to dram_dq[2]
set_location_assignment PIN_Y11 -to dram_dq[1]
set_location_assignment PIN_AA12 -to dram_dq[0]
set_location_assignment PIN_V10 -to dram_udqm
set_location_assignment PIN_AB7 -to dram_ldqm
set_location_assignment PIN_AB6 -to dram_ras_n
set_location_assignment PIN_W9 -to dram_we_n
# Serial port (USB-to-Serial)
set_location_assignment PIN_L19 -to rx1
set_location_assignment PIN_L18 -to tx1
set_location_assignment PIN_M18 -to rts1
set_location_assignment PIN_N19 -to cts1
# Second serial port
# SD Card
set_location_assignment PIN_C16 -to sdcard_sclk
set_location_assignment PIN_B15 -to sdcard_cs
set_location_assignment PIN_B16 -to sdcard_miso
set_location_assignment PIN_C15 -to sdcard_mosi
# Seven segment display (on J1)
# Ethernet
set_location_assignment PIN_T20 -to xu_cs
set_location_assignment PIN_P17 -to xu_debug_tx
set_location_assignment PIN_P16 -to xu_miso
set_location_assignment PIN_N21 -to xu_mosi
set_location_assignment PIN_N20 -to xu_sclk
# PS/2 Keyboard
set_location_assignment PIN_AA2 -to ps2k_c
set_location_assignment PIN_AA1 -to ps2k_d
# Video
set_location_assignment PIN_E12 -to vgar[0]
set_location_assignment PIN_D12 -to vgar[1]
set_location_assignment PIN_B13 -to vgab[0]
set_location_assignment PIN_A13 -to vgab[1]
set_location_assignment PIN_D13 -to vgag[0]
set_location_assignment PIN_C13 -to vgag[1]
set_location_assignment PIN_A15 -to vgah
set_location_assignment PIN_A14 -to vgav
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