Difference between revisions of "Cyclone II EP2C5 Mini Dev Board"

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[[File:EP2C5 Board.jpg]]
+
[[File:EP2C5-Mini-Board-TopView-720px.jpg]]
  
 
== Features ==
 
== Features ==
  
 +
* [[EP2C5-DB|EP2C5-DB Multicomp Adapter card]]
 
* FPGA part is EP2C5T144C8 (marking is EP2C5T144C8N)
 
* FPGA part is EP2C5T144C8 (marking is EP2C5T144C8N)
 +
* [https://www.ebay.com/sch/i.html?_from=R40&_trksid=m570.l1313&_nkw=EP2C5T144+board&_sacat=0&LH_TitleDesc=0&_osacat=0&_odkw=EP2C5T144 Ebay listing]
 
* 80+ I/O pins
 
* 80+ I/O pins
 
** (4) 14x2 headers (0.1" pitch)
 
** (4) 14x2 headers (0.1" pitch)
Line 20: Line 22:
 
* [https://web.archive.org/web/20180811234229/https://github.com/douggilliland/EP2C5-Cyclone-II-Mini-Board Land Boards GitHub repo]
 
* [https://web.archive.org/web/20180811234229/https://github.com/douggilliland/EP2C5-Cyclone-II-Mini-Board Land Boards GitHub repo]
 
* Quartus II 64-bit Edition 13.0.1 SP 1 Web Edition
 
* Quartus II 64-bit Edition 13.0.1 SP 1 Web Edition
** [https://web.archive.org/web/20180811234229/https://courses.cs.washington.edu/courses/cse467/15wi/docs/Quartus_II_Handbook.pdf Quartus II Handbook (pdf)]
+
**[https://web.archive.org/web/20180811234229/https://courses.cs.washington.edu/courses/cse467/15wi/docs/Quartus_II_Handbook.pdf Quartus II Handbook (pdf)]
* Upload temporary program over JTAG
+
* JTAG - Upload temporary .sof program over JTAG
 
** Does not remain after power cycling
 
** Does not remain after power cycling
* Upload to EPROM over ASM
+
* AS - Upload ,pof file to EPROM over AS
 +
** Flash EPROM = EPCS4
 
** Remains after power cycling
 
** Remains after power cycling
 +
 +
[[FILE:EP2CE_P428-720PX.jpg]]
  
 
== I/O Pin Mapping ==
 
== I/O Pin Mapping ==
Line 35: Line 40:
 
17 50MHz clock input
 
17 50MHz clock input
 
73 10uF capacitor to ground 10K resistor to Vcc, for power up reset if needed?
 
73 10uF capacitor to ground 10K resistor to Vcc, for power up reset if needed?
26 Connected to Vcc 1.2V Only needed for EPC28. The "zero ohm" resistor could be removed and the pin used as normal.
+
26 Connected to Vcc 1.2V Only needed for EP2C8. The "zero ohm" resistor could be removed and the pin used as normal.
27 Connected to GND Only needed for EPC28. The "zero ohm" resistor could be removed and the pin used as normal.
+
27 Connected to GND Only needed for EP2C8. The "zero ohm" resistor could be removed and the pin used as normal.
80 Connected to GND Only needed for EPC28. The "zero ohm" resistor could be removed and the pin used as normal.
+
80 Connected to GND Only needed for EP2C8. The "zero ohm" resistor could be removed and the pin used as normal.
81 Connected to Vcc 1.2V Only needed for EPC28. The "zero ohm" resistor could be removed and the pin used as normal.
+
81 Connected to Vcc 1.2V Only needed for EP2C8. The "zero ohm" resistor could be removed and the pin used as normal.
 
</pre>
 
</pre>
 +
 +
== Onboard LEDs and button ==
 +
 +
=== LEDs and button on EP2C5 Board ===
 +
 +
* D2 is on PIN_3
 +
* D4 is on PIN_7
 +
* D5 is on PIN_9
 +
* key is on PIN_144
 +
 +
[[File:LEDs_on_EP2C5_PCB.jpg]]
 +
 +
[[File:LEDs_Schematic.PNG]]
 +
 +
Pins 26 and 81 are tied to 1.2V and the default selection is to drive all unused pins to GND, making short circuit and that's why the onboard LM1117 1.2V regulator get really hot. You should go to Assignments->Device->Device and Pin Options...->Unused Pins and set it to "As input tri-stated  with weak pull-up" (or "... with bus-hold circuitry"). Then everything stays cool.
  
 
== Quartus II Notes ==
 
== Quartus II Notes ==
  
 +
* Requires older version of Quartus II
 +
** Version 13.0 SP1
 
* Project > Copy Project to create a separate copy of your project, rather than just a revision within the same project
 
* Project > Copy Project to create a separate copy of your project, rather than just a revision within the same project
 
* VHDL Examples
 
* VHDL Examples
* Requirements
+
 
Cyclone II EP2C5 Mini Dev Board - Boards on Ebay
+
== Requirements ==
USB Blaster
+
 
5V Power Supply, either
+
* [http://www.ebay.com/itm/142101985664?_trksid=p2057872.m2749.l2649&ssPageName=STRK%3AMEBIDX%3AITEP2C5T144C8N Cyclone II EP2C5 Mini Dev Board] - Boards on Ebay
5V Wall Wart, or
+
* [http://www.ebay.com/sch/i.html?_odkw=usb+blaster&_sop=15&LH_BIN=1&LH_FS=1&_osacat=0&_from=R40&_trksid=p2045573.m570.l1311.R2.TR6.TRC1.A0.H1.TRS1&_nkw=usb+blaster+altera&_sacat=0 USB Blaster]
USB to 5V cable
+
* 5V Power Supply, either
Links
+
** [http://www.ebay.com/sch/i.html?_odkw=5v+DC+ac&_sop=15&LH_BIN=1&LH_FS=1&_osacat=0&_from=R40&_trksid=p2045573.m570.l1313.TR0.TRC0.H0.Xpower+adapter+5v+DC+ac.TRS1&_nkw=power+adapter+5v+DC+ac&_sacat=0 5V Wall Wart], or
Getting started with the EP2C5 Cyclone II Mini Board - Quick start
+
** [http://www.ebay.com/sch/i.html?_sop=15&_from=R40&_sacat=0&LH_BIN=1&_nkw=usb%205v%20DC%202.1mm%20cable&rt=nc&LH_FS=1&_trksid=p2045573.m1684 USB to 5V cable]
Board Schematic Diagram.pdf
+
 
Cyclone II Device Handbook (pdf)
+
== Links ==
Cyclone® II EP2C5 Device Pin-out (pdf)
+
 
EP2C5 core board test.zip
+
* [http://www.leonheller.com/FPGA/FPGA.html Getting started with the EP2C5 Cyclone II Mini Board - Quick start]
EP2C5T144E Diagrams.zip
+
** [http://www.leonheller.com/FPGA/EP2C5T144mini.pdf Board Schematic Diagram.pdf]
UK101 FPGA based computer
+
* [https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyc2/cyc2_cii5v1.pdf Cyclone II Device Handbook (pdf)]
Videos
+
* [https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/dp/cyclone2/ep2c5.pdf Cyclone® II EP2C5 Device Pin-out (pdf)]
Cyclone II FPGA Overview
+
* [https://www.openimpulse.com/blog/wp-content/uploads/wpsc/downloadables/EP2C5-core-board-test.zip EP2C5 core board test.zip]
Tutorial Video - Getting Started with VHDL and the Cyclone II EP2C5 Mini Dev Board
+
* [https://www.openimpulse.com/blog/wp-content/uploads/wpsc/downloadables/EP2C5T144E-Diagrams.zip EP2C5T144E Diagrams.zip]
Video uses Quartus II 11.1 SP 2
+
* [http://searle.hostei.com/grant/uk101FPGA/index.html UK101 FPGA based computer]
Breadboard To Cyclone II Wiring
+
* [https://www.prusaprinters.org/prints/5437-case-for-altera-cyclone-ii-ep2c5t-board Case for Altera Cyclone II EP2C5T board]
Cyclone II - Breadboard Inputs and Outputs
+
* [https://github.com/tocache/Altera-Cyclone-II-FPGA/tree/master/NIOS%20II NIOS II Implementation on Cyclone II EP2C5T board (in spanish)]
Altera Cyclone II EP2C5T144 FPGA Mini Board
+
 
[ ]
+
== Videos ==
 +
 
 +
* [https://youtu.be/Uss6RKC9KaM Cyclone II FPGA Overview]
 +
* [https://www.youtube.com/watch?v=le6Jo5DpLao Tutorial Video] - Getting Started with VHDL and the Cyclone II EP2C5 Mini Dev Board
 +
** Video uses Quartus II 11.1 SP 2
 +
* [https://youtu.be/dToTM6GE-Uc Breadboard To Cyclone II Wiring]
 +
* [https://youtu.be/4E6_-8fmmWg Cyclone II - Breadboard Inputs and Outputs]
 +
* [https://youtu.be/ZVbPpyMeOTU Altera Cyclone II EP2C5T144 FPGA Mini Board]
  
 
== Pin List (Multicomp) ==
 
== Pin List (Multicomp) ==
 
<pre>
 
<pre>
 +
set_global_assignment -name FAMILY "Cyclone II"
 +
set_global_assignment -name DEVICE EP2C5T144C8
 +
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
 +
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
 +
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "USE AS REGULAR IO"
 +
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
 +
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
 +
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
 +
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
 +
# Clocks and reset
 +
set_location_assignment PIN_17 -to clk
 +
set_location_assignment PIN_144 -to n_reset
 +
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to n_reset
 +
# PS/2
 +
set_location_assignment PIN_86 -to io_ps2Clk
 +
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to io_ps2Clk
 +
set_location_assignment PIN_87 -to io_ps2Data
 +
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to io_ps2Data
 +
# ACIA
 
set_location_assignment PIN_101 -to rxd1
 
set_location_assignment PIN_101 -to rxd1
 +
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to rxd1
 
set_location_assignment PIN_103 -to txd1
 
set_location_assignment PIN_103 -to txd1
 
set_location_assignment PIN_104 -to rts1
 
set_location_assignment PIN_104 -to rts1
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to rxd1
+
# SRAM
set_location_assignment PIN_17 -to clk
+
set_location_assignment PIN_126 -to o_n_extSRamCS
set_location_assignment PIN_144 -to n_reset
+
set_location_assignment PIN_4 -to o_n_extSRamWE
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to n_reset
+
set_location_assignment PIN_134 -to o_n_extSRamOE
set_location_assignment PIN_4 -to n_sRamWE
+
set_location_assignment PIN_121 -to o_extSRamAddress[0]
set_location_assignment PIN_126 -to n_sRamCS
+
set_location_assignment PIN_125 -to o_extSRamAddress[1]
set_location_assignment PIN_134 -to n_sRamOE
+
set_location_assignment PIN_129 -to o_extSRamAddress[2]
set_location_assignment PIN_32 -to sramAddress[16]
+
set_location_assignment PIN_133 -to o_extSRamAddress[3]
set_location_assignment PIN_8 -to sramAddress[15]
+
set_location_assignment PIN_135 -to o_extSRamAddress[4]
set_location_assignment PIN_30 -to sramAddress[14]
+
set_location_assignment PIN_137 -to o_extSRamAddress[5]
set_location_assignment PIN_24 -to sramAddress[13]
+
set_location_assignment PIN_141 -to o_extSRamAddress[6]
set_location_assignment PIN_28 -to sramAddress[12]
+
set_location_assignment PIN_143 -to o_extSRamAddress[7]
set_location_assignment PIN_136 -to sramAddress[11]
+
set_location_assignment PIN_142 -to o_extSRamAddress[8]
set_location_assignment PIN_132 -to sramAddress[10]
+
set_location_assignment PIN_139 -to o_extSRamAddress[9]
set_location_assignment PIN_139 -to sramAddress[9]
+
set_location_assignment PIN_132 -to o_extSRamAddress[10]
set_location_assignment PIN_142 -to sramAddress[8]
+
set_location_assignment PIN_136 -to o_extSRamAddress[11]
set_location_assignment PIN_143 -to sramAddress[7]
+
set_location_assignment PIN_28 -to o_extSRamAddress[12]
set_location_assignment PIN_141 -to sramAddress[6]
+
set_location_assignment PIN_24 -to o_extSRamAddress[13]
set_location_assignment PIN_137 -to sramAddress[5]
+
set_location_assignment PIN_30 -to o_extSRamAddress[14]
set_location_assignment PIN_133 -to sramAddress[3]
+
set_location_assignment PIN_8 -to o_extSRamAddress[15]
set_location_assignment PIN_135 -to sramAddress[4]
+
set_location_assignment PIN_32 -to o_extSRamAddress[16]
set_location_assignment PIN_129 -to sramAddress[2]
+
set_location_assignment PIN_119 -to io_extSRamData[0]
set_location_assignment PIN_125 -to sramAddress[1]
+
set_location_assignment PIN_115 -to io_extSRamData[1]
set_location_assignment PIN_121 -to sramAddress[0]
+
set_location_assignment PIN_113 -to io_extSRamData[2]
set_location_assignment PIN_122 -to sramData[7]
+
set_location_assignment PIN_112 -to io_extSRamData[3]
set_location_assignment PIN_120 -to sramData[6]
+
set_location_assignment PIN_114 -to io_extSRamData[4]
set_location_assignment PIN_118 -to sramData[5]
+
set_location_assignment PIN_118 -to io_extSRamData[5]
set_location_assignment PIN_114 -to sramData[4]
+
set_location_assignment PIN_120 -to io_extSRamData[6]
set_location_assignment PIN_112 -to sramData[3]
+
# Composite Video
set_location_assignment PIN_113 -to sramData[2]
 
set_location_assignment PIN_115 -to sramData[1]
 
set_location_assignment PIN_119 -to sramData[0]
 
 
 
 
set_location_assignment PIN_75 -to video
 
set_location_assignment PIN_75 -to video
 
set_location_assignment PIN_74 -to videoSync
 
set_location_assignment PIN_74 -to videoSync
set_location_assignment PIN_87 -to ps2Data
+
# VGA
set_location_assignment PIN_86 -to ps2Clk
 
 
 
 
set_location_assignment PIN_64 -to videoB0
 
set_location_assignment PIN_64 -to videoB0
 
set_location_assignment PIN_63 -to videoB1
 
set_location_assignment PIN_63 -to videoB1
Line 119: Line 162:
 
set_location_assignment PIN_71 -to hSync
 
set_location_assignment PIN_71 -to hSync
 
set_location_assignment PIN_72 -to vSync
 
set_location_assignment PIN_72 -to vSync
 
+
# LEDs
set_location_assignment PIN_25 -to J6_3
+
set_location_assignment PIN_53 -to o_ledDS1
set_location_assignment PIN_31 -to J6_4
+
set_location_assignment PIN_3 -to o_ledD2
set_location_assignment PIN_41 -to J6_5
+
set_location_assignment PIN_7 -to o_ledD4
set_location_assignment PIN_40 -to J6_6
+
set_location_assignment PIN_9 -to o_ledD5
set_location_assignment PIN_43 -to J6_7
+
# SD Card
set_location_assignment PIN_42 -to J6_8
+
set_location_assignment PIN_92 -to sdMISO
set_location_assignment PIN_45 -to J6_9
+
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to sdMISO
set_location_assignment PIN_44 -to J6_10
+
set_location_assignment PIN_94 -to sdSCLK
 +
set_location_assignment PIN_93 -to sdMOSI
 +
set_location_assignment PIN_97 -to sdCS
 +
set_location_assignment PIN_53 -to driveLED
 +
# J6 I/O
 +
set_location_assignment PIN_25 -to J6IO8[0]
 +
set_location_assignment PIN_31 -to J6IO8[1]
 +
set_location_assignment PIN_41 -to J6IO8[2]
 +
set_location_assignment PIN_40 -to J6IO8[3]
 +
set_location_assignment PIN_43 -to J6IO8[4]
 +
set_location_assignment PIN_42 -to J6IO8[5]
 +
set_location_assignment PIN_45 -to J6IO8[6]
 +
set_location_assignment PIN_44 -to J6IO8[7]
 +
# J8 I/O
 +
set_location_assignment PIN_48 -to J8IO8[0]
 +
set_location_assignment PIN_47 -to J8IO8[1]
 +
set_location_assignment PIN_52 -to J8IO8[2]
 +
set_location_assignment PIN_51 -to J8IO8[3]
 +
set_location_assignment PIN_58 -to J8IO8[4]
 +
set_location_assignment PIN_55 -to J8IO8[5]
 +
set_location_assignment PIN_76 -to J8IO8[6]
 +
set_location_assignment PIN_60 -to J8IO8[7]
 
</pre>
 
</pre>

Latest revision as of 19:45, 25 June 2021

EP2C5-Mini-Board-TopView-720px.jpg

Features

  • EP2C5-DB Multicomp Adapter card
  • FPGA part is EP2C5T144C8 (marking is EP2C5T144C8N)
  • Ebay listing
  • 80+ I/O pins
    • (4) 14x2 headers (0.1" pitch)
  • EPCS4 for configuration EPROM (4 Mbit)
  • 5 VDC power supply
    • 5V only operation
    • 2.1mm DC socket
  • (3) LEDs
  • Button
  • 50 MHz crystal oscillator (clock)
  • JTAG/SWD connectors
  • LED for power indication

Part Specific Programming

  • Land Boards GitHub repo
  • Quartus II 64-bit Edition 13.0.1 SP 1 Web Edition
  • JTAG - Upload temporary .sof program over JTAG
    • Does not remain after power cycling
  • AS - Upload ,pof file to EPROM over AS
    • Flash EPROM = EPCS4
    • Remains after power cycling

EP2CE P428-720PX.jpg

I/O Pin Mapping

FPGA Pin	Function	Notes
3	D2 LED	Low to Light LED
7	D4 LED	Low to Light LED
9	D5 LED	Low to Light LED
144	Pushbutton	Push to ground, no external pullup. Set internal pullup on FPGA configuration if used.
17	50MHz clock input	
73	10uF capacitor to ground	10K resistor to Vcc, for power up reset if needed?
26	Connected to Vcc 1.2V	Only needed for EP2C8. The "zero ohm" resistor could be removed and the pin used as normal.
27	Connected to GND	Only needed for EP2C8. The "zero ohm" resistor could be removed and the pin used as normal.
80	Connected to GND	Only needed for EP2C8. The "zero ohm" resistor could be removed and the pin used as normal.
81	Connected to Vcc 1.2V	Only needed for EP2C8. The "zero ohm" resistor could be removed and the pin used as normal.

Onboard LEDs and button

LEDs and button on EP2C5 Board

  • D2 is on PIN_3
  • D4 is on PIN_7
  • D5 is on PIN_9
  • key is on PIN_144

LEDs on EP2C5 PCB.jpg

LEDs Schematic.PNG

Pins 26 and 81 are tied to 1.2V and the default selection is to drive all unused pins to GND, making short circuit and that's why the onboard LM1117 1.2V regulator get really hot. You should go to Assignments->Device->Device and Pin Options...->Unused Pins and set it to "As input tri-stated with weak pull-up" (or "... with bus-hold circuitry"). Then everything stays cool.

Quartus II Notes

  • Requires older version of Quartus II
    • Version 13.0 SP1
  • Project > Copy Project to create a separate copy of your project, rather than just a revision within the same project
  • VHDL Examples

Requirements

Links

Videos

Pin List (Multicomp)

set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C5T144C8
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
# Clocks and reset
set_location_assignment PIN_17 -to clk
set_location_assignment PIN_144 -to n_reset
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to n_reset
# PS/2
set_location_assignment PIN_86 -to io_ps2Clk
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to io_ps2Clk
set_location_assignment PIN_87 -to io_ps2Data
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to io_ps2Data
# ACIA
set_location_assignment PIN_101 -to rxd1
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to rxd1
set_location_assignment PIN_103 -to txd1
set_location_assignment PIN_104 -to rts1
# SRAM
set_location_assignment PIN_126 -to o_n_extSRamCS
set_location_assignment PIN_4 -to o_n_extSRamWE
set_location_assignment PIN_134 -to o_n_extSRamOE
set_location_assignment PIN_121 -to o_extSRamAddress[0]
set_location_assignment PIN_125 -to o_extSRamAddress[1]
set_location_assignment PIN_129 -to o_extSRamAddress[2]
set_location_assignment PIN_133 -to o_extSRamAddress[3]
set_location_assignment PIN_135 -to o_extSRamAddress[4]
set_location_assignment PIN_137 -to o_extSRamAddress[5]
set_location_assignment PIN_141 -to o_extSRamAddress[6]
set_location_assignment PIN_143 -to o_extSRamAddress[7]
set_location_assignment PIN_142 -to o_extSRamAddress[8]
set_location_assignment PIN_139 -to o_extSRamAddress[9]
set_location_assignment PIN_132 -to o_extSRamAddress[10]
set_location_assignment PIN_136 -to o_extSRamAddress[11]
set_location_assignment PIN_28 -to o_extSRamAddress[12]
set_location_assignment PIN_24 -to o_extSRamAddress[13]
set_location_assignment PIN_30 -to o_extSRamAddress[14]
set_location_assignment PIN_8 -to o_extSRamAddress[15]
set_location_assignment PIN_32 -to o_extSRamAddress[16]
set_location_assignment PIN_119 -to io_extSRamData[0]
set_location_assignment PIN_115 -to io_extSRamData[1]
set_location_assignment PIN_113 -to io_extSRamData[2]
set_location_assignment PIN_112 -to io_extSRamData[3]
set_location_assignment PIN_114 -to io_extSRamData[4]
set_location_assignment PIN_118 -to io_extSRamData[5]
set_location_assignment PIN_120 -to io_extSRamData[6]
# Composite Video
set_location_assignment PIN_75 -to video
set_location_assignment PIN_74 -to videoSync
# VGA
set_location_assignment PIN_64 -to videoB0
set_location_assignment PIN_63 -to videoB1
set_location_assignment PIN_67 -to videoG0
set_location_assignment PIN_65 -to videoG1
set_location_assignment PIN_70 -to videoR0
set_location_assignment PIN_69 -to videoR1
set_location_assignment PIN_71 -to hSync
set_location_assignment PIN_72 -to vSync
# LEDs
set_location_assignment PIN_53 -to o_ledDS1
set_location_assignment PIN_3 -to o_ledD2
set_location_assignment PIN_7 -to o_ledD4
set_location_assignment PIN_9 -to o_ledD5
# SD Card
set_location_assignment PIN_92 -to sdMISO
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to sdMISO
set_location_assignment PIN_94 -to sdSCLK
set_location_assignment PIN_93 -to sdMOSI
set_location_assignment PIN_97 -to sdCS
set_location_assignment PIN_53 -to driveLED
# J6 I/O
set_location_assignment PIN_25 -to J6IO8[0]
set_location_assignment PIN_31 -to J6IO8[1]
set_location_assignment PIN_41 -to J6IO8[2]
set_location_assignment PIN_40 -to J6IO8[3]
set_location_assignment PIN_43 -to J6IO8[4]
set_location_assignment PIN_42 -to J6IO8[5]
set_location_assignment PIN_45 -to J6IO8[6]
set_location_assignment PIN_44 -to J6IO8[7]
# J8 I/O
set_location_assignment PIN_48 -to J8IO8[0]
set_location_assignment PIN_47 -to J8IO8[1]
set_location_assignment PIN_52 -to J8IO8[2]
set_location_assignment PIN_51 -to J8IO8[3]
set_location_assignment PIN_58 -to J8IO8[4]
set_location_assignment PIN_55 -to J8IO8[5]
set_location_assignment PIN_76 -to J8IO8[6]
set_location_assignment PIN_60 -to J8IO8[7]