Editing Front Panel for 8 Bit Computers V2

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<pre>
0x0000-0x7FFF - 32KB INTERNAL SRAM
+
0x0000-0x7FFF - INTERNAL SRAM
0XEC00-0xEFFF - 1KB INTERNAL SRAM (SCRATCHPAD SRAM USED BY MIKBUG)
+
0x8018-0x8019 - VDU (serSelect J3 JUMPER REMOCED)
0xFC18-0xFC19 - VDU (serSelect J3 JUMPER REMOVED)
+
0x8028-0x8019 - ACIA
0xFC28-0xFC19 - ACIA
+
0x8030-0x803F - Front Panel
0xFC30-0xFC3F - Front Panel
+
0xC000-0xFFFF - MIKBUG ROM - Copied 4X
0xF000-0xFFFF - MIKBUG ROM - Copied 4X
 
 
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===== Halt CPU =====
 
===== Halt CPU =====
  
* Card comes up running [https://github.com/douggilliland/MultiComp/blob/master/MultiComp%20(VHDL%20Template)/Components/ROMs/MIKBUG_6800/DGG_MIKBUG_60KB.LST SMITHBUG at 0xF000]
+
* Card comes up running [https://github.com/douggilliland/Retro-Computers/blob/master/6800/Smithbug/V2_DIS_corrected.LST SMITHBUG at 0xC000]
 
* RUN LED comes up on
 
* RUN LED comes up on
 
* A0-A15 LEDs light "dimly" once CPU is running
 
* A0-A15 LEDs light "dimly" once CPU is running
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* Enter address set mode by pressing SW24 SETADR pushbutton, LED will illuminate
 
* Enter address set mode by pressing SW24 SETADR pushbutton, LED will illuminate
* Set address to 0xF000 by pressing A31, A30, A29, A28 LEDs will light
+
* Set address to 0xC000 by pressing A31, A30, LEDs will light
 
* Press SETADR pushbutton again to exit set address mode, LED will go off
 
* Press SETADR pushbutton again to exit set address mode, LED will go off
 
* For MIKBUG, data will be 0x8E
 
* For MIKBUG, data will be 0x8E
 
* Press INCADR SW26
 
* Press INCADR SW26
* Address will increment to 0F001
+
* Address will increment to 0xC001
 
* Data will show 0x7F
 
* Data will show 0x7F
 
* Next INCADR values are as follows
 
* Next INCADR values are as follows
 
<pre>
 
<pre>
   f000   8e ef 44     LDS #STACK
+
   c000                START EQU *
   f003   bf ef 0a     STS SP
+
  c000   8e 7f 44     LDS #STACK
   f006   7f ef 0d     CLR ECHO ; DGG - default to serial port echo on
+
   c003   bf 7f 0a     STS SP
   f009   ce f1 25     LDX #SFE ; DGG - VECTORED SWI ROUTINE
+
   c006   7f 7f 0d     CLR ECHO
   f00c   ff ef 17     STX SWIPTR
+
   c009   ce c1 25     LDX #SFE
   f00f   ff ef 08     STX NIO
+
   c00c   ff 7f 17     STX SWIPTR
 +
   c00f   ff 7f 08     STX NIO
 
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