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| − | [[File:P913-cropped-512pxV.jpg.jpg]]
| + | == Homebrew RF Attenuators == |
| | | | |
| − | == Features ==
| + | [[file:Atten_30dB_20dV_P1812-720px.jpg]] |
| | | | |
| − | * Purchased FPGA Card
| + | == Attenuators == |
| − | * QMTECH EP4CE15 Board
| |
| − | * Crystal frequency: 50MHz
| |
| − | * Altera Cyclone IV [https://www.digikey.com/product-detail/en/intel/EP4CE15F23C8N/544-2809-ND/2288329 EP4CE15F23C8N FPGA]
| |
| − | * Winbond [https://www.winbond.com/resource-files/da00-w9825g6khc1.pdf W9825C6KH-6 4M X 4 Banks x 16 bits SDRAM]
| |
| − | * W25Q64 SPI Flash
| |
| − | * 3 Switches
| |
| − | * DC power jack
| |
| − | ** 5V 1A
| |
| − | ** DC-050, 5.5mmx2.1mm
| |
| − | ** Power supply
| |
| − | * 6.7cm x 8.4cm
| |
| | | | |
| − | == Switches/Indications ==
| + | [[file:Chart_mW_vs_dbM.PNG]] |
| | | | |
| − | * pOWER LED - D4
| + | === 30 dB Attenuator === |
| − | * uSER LED - D5
| |
| − | * KEY0 - SW1
| |
| − | * KEY1 - SW2
| |
| − | * nCONFIG - SW3
| |
| − | * JP5 - 5V
| |
| | | | |
| − | == Jumpers ==
| + | * [http://leleivre.com/rf_pipad.html Pi Attenuator Calculator] |
| | | | |
| − | * J2 - JTAG
| + | [[file:Atten30dB_P116-720px.jpg]] |
| | | | |
| − | == Pages ==
| + | [[file:30dB_Attenuator.PNG]] |
| | | | |
| − | * [https://github.com/ChinaQMTECH/CYCLONE_IV_EP4CE15 QMTECH EP4CE15] | + | * Built |
| | + | ** Standard 5% resistor values |
| | + | ** R1 = 820 in parallel with 22K = 790.6 ohms |
| | + | ** R2 = 2 paralleled 120 Ohm 1/4W resistors paralleled with 470 ohms = 53.2 ohms |
| | + | ** Flat from 0-30 MHz |
| | + | ** Measured attenuation is flat |
| | + | *** -30.01dB at 1 MHz |
| | + | *** -30.24dB at 30 MHz |
| | + | ** Input Impedance - 53.1 ohms, 21.3nF |
| | + | ** SWR 1.06 |
| | + | ** 1/2W max (5VDC max, 0 ohm source) |
| | | | |
| − | == Mechanicals ==
| + | * NanoVNA scan data |
| | | | |
| − | [[File:QMTECH_FPGA_EP4CE15.jpg]] | + | [[file:30dB_Attenuator_NanoVNA_Setup_Curve_900MHz.PNG]] |
| − | == Pin List ==
| |
| | | | |
| − | <pre>
| + | [[file:30dB_Attenuator_NanoVNA_Data_900MHz.PNG]] |
| − | set_location_assignment PIN_T2 -to i_CLOCK_50
| + | |
| − | set_location_assignment PIN_W13 -to n_reset
| + | * LTSPICE Simulation |
| − | set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to n_reset
| + | |
| − | set_location_assignment PIN_R1 -to ps2Clk
| + | [[file:LTSPice_30dB.PNG]] |
| − | set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ps2Clk
| + | |
| − | set_location_assignment PIN_R2 -to ps2Data
| + | === 20 dB Attenuator === |
| − | set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ps2Data
| + | |
| − | set_location_assignment PIN_C22 -to serSelect
| + | [[file:Atten_20dB_P115-720px.jpg]] |
| − | set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to serSelect
| + | |
| − | set_location_assignment PIN_A10 -to cts1
| + | [[file:20dB_Attenuator.PNG]] |
| − | set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to cts1
| + | |
| − | set_location_assignment PIN_A13 -to rts1
| + | * Build |
| − | set_location_assignment PIN_B10 -to rxd1
| + | ** Standard 5% resistor values |
| − | set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to rxd1
| + | ** R1 = 2 of 510 in parallel also in parallel with 8.2K = 247.3 ohms |
| − | set_location_assignment PIN_B13 -to txd1
| + | ** R2 = 2 paralleled 150 Ohm 1/2W resistors paralleled with 330 ohms = 61.11 ohms |
| − | set_location_assignment PIN_B17 -to videoB0
| + | ** Flat from 0-30 MHz |
| − | set_location_assignment PIN_A17 -to videoB1
| + | ** Measured attenuation is flat |
| − | set_location_assignment PIN_B16 -to videoG0
| + | ** Input Impedance - tbd ohms, tbd nF |
| − | set_location_assignment PIN_A16 -to videoG1
| + | ** SWR tbd |
| − | set_location_assignment PIN_B20 -to videoR0
| + | ** 1W max (8.6 V max, 0 ohm source) |
| − | set_location_assignment PIN_A15 -to videoR1
| + | |
| − | set_location_assignment PIN_B18 -to hSync
| + | [[file:20dB_Attenuator_NanoVNA_Setup_Curve_900MHz.PNG]] |
| − | set_location_assignment PIN_A18 -to vSync
| + | |
| − | set_location_assignment PIN_F1 -to n_sRamCS
| + | [[file:20dB_Attenuator_NanoVNA_Data_900MHz.PNG]] |
| − | set_location_assignment PIN_B4 -to n_sRamWE
| + | |
| − | set_location_assignment PIN_J2 -to n_sRamOE
| + | * LTSPICE Simulation |
| − | set_location_assignment PIN_E1 -to sramData[0]
| + | |
| − | set_location_assignment PIN_C1 -to sramData[1]
| + | [[file:LTSPice_20dB.PNG]] |
| − | set_location_assignment PIN_B1 -to sramData[2]
| + | |
| − | set_location_assignment PIN_B3 -to sramData[3]
| + | === 10 dB Attenuator === |
| − | set_location_assignment PIN_B2 -to sramData[4]
| + | |
| − | set_location_assignment PIN_C2 -to sramData[5]
| + | [[file:Atten_10dB_P115-720px.jpg]] |
| − | set_location_assignment PIN_D2 -to sramData[6]
| + | |
| − | set_location_assignment PIN_F2 -to sramData[7]
| + | [[file:10dB_Attenuator.PNG]] |
| − | set_location_assignment PIN_H1 -to sramAddress[0]
| + | |
| − | set_location_assignment PIN_J1 -to sramAddress[1]
| + | * Build |
| − | set_location_assignment PIN_M1 -to sramAddress[2]
| + | ** Standard 5% resistor values |
| − | set_location_assignment PIN_N1 -to sramAddress[3]
| + | ** R1 = 2 of 150 in parallel also in parallel with 1.5K = 71.43 ohms (0.3% error) |
| − | set_location_assignment PIN_A8 -to sramAddress[15]
| + | ** R2 = 3 of 330 Ohm 1/4W parallel resistors paralleled with 810 ohms = 96.85 ohms (0.62% error) |
| − | set_location_assignment PIN_A7 -to sramAddress[14]
| + | ** Flat from 0-30 MHz |
| − | set_location_assignment PIN_A6 -to sramAddress[13]
| + | ** Measured attenuation is flat |
| − | set_location_assignment PIN_A5 -to sramAddress[12]
| + | ** Input Impedance - tbd ohms, tbd nF |
| − | set_location_assignment PIN_C3 -to sramAddress[11]
| + | ** SWR tbd |
| − | set_location_assignment PIN_A4 -to sramAddress[10]
| + | ** 3/4W max (9.1 V max, 0 ohm source) |
| − | set_location_assignment PIN_A3 -to sramAddress[9]
| + | |
| − | set_location_assignment PIN_H2 -to sramAddress[8]
| + | [[file:10dB_Attenuator_NanoVNA_Setup_Curve_900MHz.PNG]] |
| − | set_location_assignment PIN_M2 -to sramAddress[7]
| + | |
| − | set_location_assignment PIN_N2 -to sramAddress[6]
| + | [[file:10dB_Attenuator_NanoVNA_Data_900MHz.PNG]] |
| − | set_location_assignment PIN_P2 -to sramAddress[5]
| + | |
| − | set_location_assignment PIN_P1 -to sramAddress[4]
| + | * LTSPICE Simulation |
| − | set_location_assignment PIN_B5 -to sramAddress[18]
| + | |
| − | set_location_assignment PIN_B6 -to sramAddress[17]
| + | [[file:LTSPice_10dB.PNG]] |
| − | set_location_assignment PIN_B7 -to sramAddress[16]
| + | |
| − | # SDRAM
| + | === Attenuator Construction === |
| − | set_location_assignment PIN_Y6 -to sdRamClk
| + | |
| − | set_location_assignment PIN_W6 -to sdRamClkEn
| + | * Single side copper clad PCB |
| − | set_location_assignment PIN_AA4 -to n_sdRamCas
| + | ** Approx 2"x1" |
| − | set_location_assignment PIN_AA3 -to n_sdRamCe
| + | * Clean with steel wool |
| − | set_location_assignment PIN_AB3 -to n_sdRamRas
| + | * Solder SMA connectors |
| − | set_location_assignment PIN_AB4 -to n_sdRamWe
| + | ** Use large alligator clips to hold while soldering |
| − | set_location_assignment PIN_V2 -to sdRamAddr[0]
| + | ** Solder on sides only |
| − | set_location_assignment PIN_V1 -to sdRamAddr[1]
| + | |
| − | set_location_assignment PIN_U2 -to sdRamAddr[2]
| + | [[file:Atten_01_SMAs_720px.jpg]] |
| − | set_location_assignment PIN_U1 -to sdRamAddr[3]
| + | |
| − | set_location_assignment PIN_V3 -to sdRamAddr[4]
| + | * Cut "T" Shaped pads |
| − | set_location_assignment PIN_V4 -to sdRamAddr[5]
| + | ** I used nibbler |
| − | set_location_assignment PIN_Y2 -to sdRamAddr[6]
| + | * Center fits between connector ground pins |
| − | set_location_assignment PIN_AA1 -to sdRamAddr[7]
| + | * Glue down pads with Superglue |
| − | set_location_assignment PIN_Y3 -to sdRamAddr[8]
| + | |
| − | set_location_assignment PIN_V5 -to sdRamAddr[9]
| + | [[file:Atten_02_Pads_720px.jpg]] |
| − | set_location_assignment PIN_W1 -to sdRamAddr[10]
| + | |
| − | set_location_assignment PIN_Y4 -to sdRamAddr[11]
| + | * Solder center pin with big solder blob |
| − | set_location_assignment PIN_V6 -to sdRamAddr[12]
| + | ** A bit too high for direct contact |
| − | set_location_assignment PIN_Y1 -to sdRamAddr[13]
| + | * Verify raised pad does not short to ground |
| − | set_location_assignment PIN_W2 -to sdRamAddr[14]
| + | |
| − | set_location_assignment PIN_AA10 -to sdRamData[0]
| + | [[file:Atten_03_Solder CenterPads_720px.jpg]] |
| − | set_location_assignment PIN_AB9 -to sdRamData[1]
| + | |
| − | set_location_assignment PIN_AA9 -to sdRamData[2]
| + | * Solder side resistor(s) |
| − | set_location_assignment PIN_AB8 -to sdRamData[3]
| + | * Leave room for center resistor(s) |
| − | set_location_assignment PIN_AA8 -to sdRamData[4]
| + | |
| − | set_location_assignment PIN_AB7 -to sdRamData[5]
| + | [[file:Atten_04_Solder Side_Resistors_720px.jpg]] |
| − | set_location_assignment PIN_AA7 -to sdRamData[6]
| + | |
| − | set_location_assignment PIN_AB5 -to sdRamData[7]
| + | * Measure side resistors from pad to ground |
| − | set_location_assignment PIN_Y7 -to sdRamData[8]
| + | * Should match value |
| − | set_location_assignment PIN_W8 -to sdRamData[9]
| + | * Solder center resistor(s) |
| − | set_location_assignment PIN_Y8 -to sdRamData[10]
| + | |
| − | set_location_assignment PIN_V9 -to sdRamData[11]
| + | [[file:Atten_05_Solder Center_Resistors_720px.jpg]] |
| − | set_location_assignment PIN_V10 -to sdRamData[12]
| + | |
| − | set_location_assignment PIN_Y10 -to sdRamData[13]
| + | * Verify no shorts between centers and ground |
| − | set_location_assignment PIN_W10 -to sdRamData[14]
| + | |
| − | set_location_assignment PIN_V11 -to sdRamData[15]
| + | == References == |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to hSync
| + | |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to n_reset
| + | <video type="youtube">A5gGeV7CiQ0</video> |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ps2Clk
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ps2Data
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to videoB0
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to videoB1
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to videoG0
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to videoG1
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to videoR0
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to videoR1
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vSync
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to rts1
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to rxd1
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to txd1
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to n_sRamCS
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to n_sRamOE
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to n_sRamWE
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramData[0]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramData[1]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramData[2]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramData[3]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramData[4]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramData[5]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramData[6]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramData[7]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[0]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[1]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[2]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[3]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[4]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[5]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[6]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[7]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[8]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[15]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[14]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[13]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[10]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[9]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[11]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[12]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[16]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[17]
| |
| − | set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sramAddress[18]
| |
| − | </pre> | |
