R32V2020 Instruction Pipeline

Instruction_Pipeline.png

Program Counter (PC)

• PC is set to 0x00000000 at reset or power up
• The PC needs a single clock "phase" to load or increment
• The PC performs increment/Load operations
• The PC is most often just incremented after an opcode is fetched into the next stage
• Sometimes a new PC value is loaded (various jumps)
• The PC can be pre-incremented after the previous instruction is loaded into the later stages
  • This would require adjustment for branching

PC Control Lines

• clk - 50 MHz FPGA clock - count is held while not ld, clr, inc, or dec
• ld - load 32-bit PC - from register file input mux
• clr - not n_reset - async clears - at reset
• inc - increment PC - from timing controller - State = S5
  • Since ld takes precedence over inc can always inc regardless since the counter will ignore inc in that case
• dec - decrement PC - '0' (PC either gets loaded or incremented only)

Instruction ROM

• Instruction ROM is loaded with machine code
  • R32V2020 Assembler generates machine code and loads it into a .HEX file
  • .HEX file gets compiled with the FPGA and uploaded to the FPGA
• Instruction ROM is implemented with on-chip memory inside the FPGA
• The output of the Instruction ROM is the opcode for that address
• User Guide for RAM/ROM

Opcode Decoder

• The opcode decoder translates the opcode bits into control lines for the opcodes
• The control lines are used to select multiplexer inputs for the Register File input, ALU operation select, etc.

Register File (in)

• The input to the register file comes from the output of a multiplexer
• When the operation is an ALU function the input comes from the ALU Output
• When the operation is a Load from the Data, Stack or Peripheral spaces the input comes from those interfaces

ALU

• The ALU is used for Arithmetic, Logical and comparison operations
• Not all instructions use the ALU

Register File (output)

• There are two multiplexers on the output of the ALU which can select any one of the registers in the ALU
• The two multiplexer outputs are routed to the two inputs of the ALU

State Assignments

• State(0) = Clock Instruction ROM data (output) register
• State(1) =
• State(2) =
• State(3) =
• State(4) = Hold (HCF instruction) / Load R32V2020 Seven Segment Display
• State(5) = Load/Increment the Program Counter