Difference between revisions of "LB-6802-01"
Jump to navigation
Jump to search
Blwikiadmin (talk | contribs) |
Blwikiadmin (talk | contribs) |
||
Line 6: | Line 6: | ||
== Memory Map == | == Memory Map == | ||
+ | |||
+ | * 0x0000-0x7FFF 32KB SRAM | ||
+ | * 0x8000-0xBFFF Serial (68B50 ACIA) | ||
+ | * 0xC000-0xFFFF 16KB EPROM | ||
== Design == | == Design == |
Revision as of 13:36, 24 August 2024
Contents
Features
- 68B02 CPU
- 1.8432 MHz clock
- MC6802 is fully compatible with MC6800 but without messy two-phase clocking
Memory Map
- 0x0000-0x7FFF 32KB SRAM
- 0x8000-0xBFFF Serial (68B50 ACIA)
- 0xC000-0xFFFF 16KB EPROM