Difference between revisions of "LB-6802-01"
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<PRE> | <PRE> | ||
| − | Name LB- | + | Name LB-65CXX-01_PLD; |
Partno ATF16V8B; | Partno ATF16V8B; | ||
| − | Date 09/ | + | Date 09/14/24; |
Revision 01; | Revision 01; | ||
Designer DOUG G; | Designer DOUG G; | ||
Company LAND BOARDS LLC; | Company LAND BOARDS LLC; | ||
| − | Assembly | + | Assembly LB65CXX01_U2; |
Location Rustbelt, US; | Location Rustbelt, US; | ||
Device G16V8; | Device G16V8; | ||
/* | /* | ||
| + | 65C02 Control | ||
*/ | */ | ||
| − | |||
/* Control inputs */ | /* Control inputs */ | ||
| Line 62: | Line 62: | ||
PIN 5 = CPUA15; | PIN 5 = CPUA15; | ||
PIN 6 = CPUREAD; | PIN 6 = CPUREAD; | ||
| − | |||
PIN 8 = VPA; | PIN 8 = VPA; | ||
| − | PIN 9 = VDA; | + | PIN 9 = VDA; /* Pin 39, PH2OUT - Enable line */ |
| + | PIN 11 = D0; | ||
/* Address Decode and Chip Select outputs */ | /* Address Decode and Chip Select outputs */ | ||
| − | |||
PIN 13 = !IOCS; | PIN 13 = !IOCS; | ||
| − | PIN 14 = !MEMRD; | + | PIN 14 = !ROMCS; |
| + | PIN 15 = !MEMRD; | ||
PIN 16 = !RAMCS; | PIN 16 = !RAMCS; | ||
| + | PIN 17 = LED; | ||
PIN 18 = RDY; | PIN 18 = RDY; | ||
| − | + | RAMCS = !CPUA15 & CPUREAD /* 0x0000-0x7FFF */ | |
| + | # !CPUA15 & !CPUREAD & VDA; | ||
| − | + | IOCS = CPUA15 & !CPUA14 & CPUA13 & !CPUA12 & CPUREAD /* 0x8000-0x8FFF */ | |
| − | # | + | # CPUA15 & !CPUA14 & CPUA13 & !CPUA12 & !CPUREAD & VDA; |
| − | + | ROMCS = CPUA15 & CPUA14 & CPUREAD; /* 0xC000-0xFFFF (16KB space) */ | |
| − | |||
| − | RDY = | + | RDY = VDA; |
MEMRD = CPUREAD; | MEMRD = CPUREAD; | ||
| + | |||
| + | LED = CPUA15 & CPUA14 & !CPUREAD & VDA & D0 | ||
| + | # LED & !(CPUA15 & CPUA14 & !CPUREAD & VDA); | ||
</PRE> | </PRE> | ||
Revision as of 11:58, 17 September 2024
Features
- 68B02 CPU
- 2 MHz clock
- MC6802 is fully compatible with MC6800 but without messy two-phase clocking
Memory Map
- 0x0000-0x7FFF 32KB SRAM
- 0x8000-0xBFFF Serial (68B50 ACIA)
- 0xC000-0xFFFF 16KB EPROM
Design
CPU
MC6800 Block Diagram
Bus Timing
Power Supervisor/Reset
PLD
- ATF16V8B part
- TL866ii Plus Programmer
PLD Listing
Name LB-65CXX-01_PLD; Partno ATF16V8B; Date 09/14/24; Revision 01; Designer DOUG G; Company LAND BOARDS LLC; Assembly LB65CXX01_U2; Location Rustbelt, US; Device G16V8; /* 65C02 Control */ /* Control inputs */ PIN 1 = CLK; PIN 2 = CPUA12; PIN 3 = CPUA13; PIN 4 = CPUA14; PIN 5 = CPUA15; PIN 6 = CPUREAD; PIN 8 = VPA; PIN 9 = VDA; /* Pin 39, PH2OUT - Enable line */ PIN 11 = D0; /* Address Decode and Chip Select outputs */ PIN 13 = !IOCS; PIN 14 = !ROMCS; PIN 15 = !MEMRD; PIN 16 = !RAMCS; PIN 17 = LED; PIN 18 = RDY; RAMCS = !CPUA15 & CPUREAD /* 0x0000-0x7FFF */ # !CPUA15 & !CPUREAD & VDA; IOCS = CPUA15 & !CPUA14 & CPUA13 & !CPUA12 & CPUREAD /* 0x8000-0x8FFF */ # CPUA15 & !CPUA14 & CPUA13 & !CPUA12 & !CPUREAD & VDA; ROMCS = CPUA15 & CPUA14 & CPUREAD; /* 0xC000-0xFFFF (16KB space) */ RDY = VDA; MEMRD = CPUREAD; LED = CPUA15 & CPUA14 & !CPUREAD & VDA & D0 # LED & !(CPUA15 & CPUA14 & !CPUREAD & VDA);
Backplane Connector
Software
- Simple-6802 Software - code compatible
- How to Program and Interface the 6800 By Andrew C. Staugaard, Jr. 1980
- 6800 instruction set
Builds
- SMITHBUG is a debugger similar to MIKBUG
- Examine/Edit memory
- Disassembly code
- Download S record (V2)
- Run code
- FIG-Forth - Forth language
- Combined SMITHBUG and FIG-Forth build
Building Code
- Uses a68 assembler
- Command line makes S-Record output
- Use srec_cat to shift 4K from EPROM absolute address 0x0000-0x0FFF to 0xF000-0xFFFF as HEX file
- Or shift in the EPROM programmer
SmithBUG Builds for LB-6802-01 CPU Card
- Pre-built software
4KB Build
A68 SMITHBUG_SIMPLE-6802_F000.ASM -l SMITHBUG_SIMPLE-6802_F000.LST -s SMITHBUG_SIMPLE-6802_F000.S srec_cat SMITHBUG_SIMPLE-6802_F000.s -offset - -minimum-addr SMITHBUG_SIMPLE-6802_F000.s -o smithbug_F000.hex -Intel
SmithBUG Commands
; 4 FORTH ; V VIEW MEMORY ; E CHANGE MEMORY ; I FILL MEMORY ; M MOVE MEMORY ; D DISASSEMBLE CODE ; G GO TO PROGRAM ; R PRINT ; @ ASCII CONVERSION ; H PRINTER ON ; J JUMP TO TARGET PROGRAM ; F FIND ; Q HARDWARE LOCATION ; T TRACE PROGRAM ; 1 BREAKPOINT ONE ; 2 BREAKPOINT TWO ; K CONTINUE AFTER BREAK ; & S1 LOAD PROGRAM ; * HARDWARE LOCATION (TBA) ; O ECHO ON ; N ECHO OFF
FIGFORTH in RAM
- Corsham Tech FIG-Forth 68 page
- FIGFORTH GitHub
- Enter command to srecord loader
&
- Using TermTerm, File, Send File
- Send fig-FORTH_6800.s19
- Type S9 to exit srecord loader
- Type J 1000 to jump to address 0x1000
- Responds with
Forth-68 1 1 + . 2 OK
- FIG-Forth-68 Commands
- Type VLIST to get list OG built-ins
TASK FORTH NOOP VLIST TRIAD INDEX LIST ? . D. D.R .R #S # SIGN #> <# SPACES WHILE ELSE IF REPEAT AGAIN END UNTIL +LOOP LOOP DO THEN ENDIF BEGIN BACK FORGET ' R/W HI LO BLOCK_READ BLOCK_WRITE ?DISC --> LOAD MESSAGE .LINE (LINE) BLOCK BUFFER DR1 DR0 EMPTY-BUFFERS UPDATE +BUF PREV USE DABS ABS M/MOD */ */MOD MOD / /MOD * S->D COLD ABORT QUIT ( DEFINITIONS VOCABULARY IMMEDIATE INTERPRET DLITERAL LITERAL [COMPILE] CREATE ID. ERROR (ABORT) -FIND NUMBER (NUMBER) LABD______________ PAD HOLD BLANKS ERASE FILL QUERY EXPECT ?STACK ." (.") -TRAILING TYPE COUNT DOES> <BUILDS ;CODE (:CODE) DECIMAL HEX SMUDGE ] [ COMPILE ?LOADING ?CSP ?PAIRS ?EXEC ?COMP ?ERROR !CSP PFA NFA CFA LFA LATEST TRAVERSE -DUP MAX MIN SPACE ROT > < = - C, , ALLOT HERE 2+ 1+ COLUMNS HLD R# CSP FLD DPL BASE STATE CURRENT CONTEXT OFFSET SCR OUT IN BLK VOC-LINK DP FENCE WARNING WIDTH TIB R0 S0 +ORIGIN B/SCR B/BUF LIMIT FIRST BL 3 2 1 0 USER VARIABLE CONSTANT ; : C! ! C@ @ TOGGLE +! DUP SWAP DROP OVER DMINUS MINUS D+ + 0< 0= R R> >R LEAVE ;S RP! SP! SP@ XOR OR AND U/ U* CMOVE CR ?TERMINAL KEY EMIT ENCLOSE (FIND) DIGIT I (DO) (+LOOP) (LOOP) 0BRANCH BRANCH EXECUTE LIT OK
SMITHBUG and FIGFORTH in ROM
- Combines SMITHBUG and FIGFORTH in ROM
- Combined Source code
- SMITHBUG in ROM from 0xC000-0xCFFF
- FIGFORTH in ROM from 0xD000-0xEFFF
- Vectors are at top of ROM from 0xFFF8-0xFFFF
- Fixes in FIG-Forth to get it to run from ROM
- The comments in the file indicated it could be run from ROM but the stack pointed to ORIG which is in ROM
- Fixed addresses of stack and I/O pointer to get it to work from ROM
- Type VLIST to get list OG built-ins
- SMITHBUG and FIGFORTH in ROM GitHub
- Assemble
A68 SMITHBUG_FORTH_SIMPLE-6802_C000.ASM -l SMITHBUG_FORTH_SIMPLE-6802_C000.LST -s SMITHBUG_FORTH_SIMPLE-6802_C000.S 6800/6801 Cross-Assembler (Portable) Ver 3.5! Copyright (c) 1985 William C. Colley, III fixes for LCC/Windows and improvement by HRJ Aug 26 2019 A68 source_file | -l list_file | | -o/-s object_file | No Errors
- Edit out RAM at top
- Make hex file
srec_cat SMITHBUG_FORTH_SIMPLE-6802_C000.s -offset - -minimum-addr SMITHBUG_FORTH_SIMPLE-6802_C000.s -o SMITHBUG_FORTH_SIMPLE-FC.hex -Intel srec_cat: SMITHBUG_FORTH_SIMPLE-6802_C000.s: 1: warning: no header record srec_cat: SMITHBUG_FORTH_SIMPLE-6802_C000.s: 1: warning: no header record
- Boots to SMITHBUG
- Type J D000 to run Fig-Forth or
- Type 4 to run Forth
- Type VLIST to get list OG built-ins
TinyBASIC
- TinyBASIC GitHub
- TINY BASIC User Manual
- Load using &
- Character/line delays 1 mSec (TeraTerm)
- Send TB_6800.s file
- Run using J 0100
Mechanicals
Checkout
Rev 2 Updates
- Add "STATUS" LED
- Add bulk cap, C6
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Rev 1
- Power supply noise trips voltage monitor
- Change C2 capacitor to 100 uF
- NOP Tester worked
- Card works
- Runs SmithBug
- Runs TinyBASIC
