Difference between revisions of "LB-Z80-01"

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Line 1: Line 1:
−
[[file:LB-Z80_P1090715-720px.jpg]]
+
[[file:LB-Z80-01_P138-720px.jpg]]
  
 
== Features ==
 
== Features ==
Line 14: Line 14:
 
*  32KB or 56KB SRAM
 
*  32KB or 56KB SRAM
 
** 0x8000-0xFFFF Using [[LB-MEM-02]] has 32 KB SRAM
 
** 0x8000-0xFFFF Using [[LB-MEM-02]] has 32 KB SRAM
−
** 0x2000-0xFFFF Using [[LB-MEM-03]] has 128KB or 512 KB of SRAM so 56 KB can be available
+
** 0x2000-0xFFFF Using [[LB-MEM-04]] has 128KB or 512 KB of SRAM so 56 KB can be available
 
* I/O
 
* I/O
 
** 0x00-0x7F - Free
 
** 0x00-0x7F - Free
Line 23: Line 23:
 
=== CPU and Power Supervisor/Reset ===
 
=== CPU and Power Supervisor/Reset ===
  
−
[[file:LB-Z80-01_CPU.PNG]]
+
[[file:LB-Z80-01_CPU_Rev2.PNG]]
  
 
* Z80 CPU
 
* Z80 CPU
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* [[TL866ii Plus Programmer]]
 
* [[TL866ii Plus Programmer]]
  
−
[[file:LB-Z80-01_PLD.PNG]]
+
[[file:LB-Z80-01_PLD_Rev2.PNG]]
  
 
==== PLD Listing ====
 
==== PLD Listing ====
Line 59: Line 59:
 
Name      LB-Z80-01_PLD;
 
Name      LB-Z80-01_PLD;
 
Partno    ATF16V8B;
 
Partno    ATF16V8B;
−
Date      09/17/20;
+
Date      10/14/24;
−
Revision  01;
+
Revision  02;
 
Designer  DOUG G;
 
Designer  DOUG G;
 
Company    LAND BOARDS LLC;
 
Company    LAND BOARDS LLC;
Line 67: Line 67:
 
Device    G16V8;
 
Device    G16V8;
  
−
/*
+
/* Rev 2 PCB
 
*/
 
*/
  
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PIN    8  = !CPURD;
 
PIN    8  = !CPURD;
 
PIN    9  = !CPUWR;
 
PIN    9  = !CPUWR;
 +
PIN    11  = CPUD0;
  
 
/* Address Decode and Chip Select outputs */
 
/* Address Decode and Chip Select outputs */
 
PIN    13  = !ROMCS;
 
PIN    13  = !ROMCS;
 
PIN    14  = !IOCS;
 
PIN    14  = !IOCS;
 +
PIN    15  = !RAMCS;
 
PIN    16  = !MEMRD;
 
PIN    16  = !MEMRD;
−
PIN    15 = !RAMCS;
+
/* PIN    17 = !WAIT; */
−
PIN    18  = !WAIT;
+
PIN    18  = LED;
  
 
ROMCS = !CPUA15 & !CPUA14 & !CPUA13 & MREQ & CPURD;
 
ROMCS = !CPUA15 & !CPUA14 & !CPUA13 & MREQ & CPURD;
  
 +
/* 56KB SRAM */
 +
/*
 
RAMCS = CPUA15 & MREQ
 
RAMCS = CPUA15 & MREQ
 
#      CPUA14 & MREQ
 
#      CPUA14 & MREQ
 
#      CPUA13 & MREQ;
 
#      CPUA13 & MREQ;
 +
*/
 +
 +
/* 32KB SRAM */
 +
RAMCS = CPUA15 & MREQ;
  
 
IOCS = !M1 & IORQ;
 
IOCS = !M1 & IORQ;
  
 +
/*
 
WAIT = !MREQ # !IORQ;
 
WAIT = !MREQ # !IORQ;
 +
*/
  
 
MEMRD = CPURD;
 
MEMRD = CPURD;
 +
 +
LED =    !CPUA15 & !CPUA14 & !CPUA13 & MREQ & CPUWR & CPUD0
 +
# LED & !(!CPUA15 & !CPUA14 & !CPUA13 & MREQ & CPUWR);
 +
 
</pre>
 
</pre>
  
Line 108: Line 122:
 
== Software ==
 
== Software ==
  
−
=== Toolchain ===
+
=== Assembly Language Toolchain ===
  
 
* TASM.EXE - Telemark Assembler
 
* TASM.EXE - Telemark Assembler
Line 136: Line 150:
 
* Adds a string read function
 
* Adds a string read function
 
* Adds an interpreter skeleton
 
* Adds an interpreter skeleton
−
* Works
+
* Works with Rev 1 card
 +
* Added LED command (Rev 2 card)
 +
** L0 - Turn off the LED
 +
** L1 - Turn on the LED
 +
* Works with Rev 2 card
  
 
=== NASCOM 2 BASIC ===
 
=== NASCOM 2 BASIC ===
Line 143: Line 161:
 
** Use [http://searle.x10host.com/z80/SimpleZ80_32K.html Grant Searle's 32KB SRAM version] if the [[LB-MEM-02]] card is used
 
** Use [http://searle.x10host.com/z80/SimpleZ80_32K.html Grant Searle's 32KB SRAM version] if the [[LB-MEM-02]] card is used
 
** Use [http://searle.x10host.com/z80/SimpleZ80.html Grant's 56KB version] if the [[LB-MEM-03]] card is used
 
** Use [http://searle.x10host.com/z80/SimpleZ80.html Grant's 56KB version] if the [[LB-MEM-03]] card is used
 +
* Needed to make some minor changes to get the code to run
 +
* [https://github.com/douggilliland/Retro-Computers/tree/master/Z80/LB-Z80/NASCOM_BASIC Code Repo]
 +
* Works
 +
 +
[[FILE:NASCOM_BOOT.PNG]]
 +
 +
==== Short Test Program ====
 +
 +
<pre>
 +
10 I=0
 +
20 PRINTI:I=I+1:GOTO 20
 +
 +
</pre>
  
 
==== Build Details ====
 
==== Build Details ====
  
 
* TASM assembler (see above)
 
* TASM assembler (see above)
−
* Assembler files (for Windows 11/DOS)
 
 
* S Record and Hex file manipulation
 
* S Record and Hex file manipulation
 
** [https://carta.tech/man-pages/man1/srec_examples.1.html Examples of srec_cat utility]
 
** [https://carta.tech/man-pages/man1/srec_examples.1.html Examples of srec_cat utility]
Line 181: Line 211:
  
 
[[file:IntelHexRecordFormat.png]]
 
[[file:IntelHexRecordFormat.png]]
−
 
−
* ASCII Table
 
−
 
−
[[file:ASCII_TABLE.PNG]]
 
  
 
==== Acknowledgements ====
 
==== Acknowledgements ====
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* BASIC is Microsoft BASIC 4.7 for the NASCOM, heavily modified by Grant to remove references to different monitors, screen handlers and keyboard matrix reading
 
* BASIC is Microsoft BASIC 4.7 for the NASCOM, heavily modified by Grant to remove references to different monitors, screen handlers and keyboard matrix reading
 
* TASM assembler is a partial distribution of the package from Speech Technology Incorporated
 
* TASM assembler is a partial distribution of the package from Speech Technology Incorporated
 +
 +
=== Software Development Tools ===
 +
 +
* [https://sdcc.sourceforge.net/ SDCC - Small Device C Compiler]
 +
** [https://sdcc.sourceforge.net/doc/sdccman.pdf SDCC Compiler User Guide]
  
 
=== References ===
 
=== References ===
Line 201: Line 232:
  
 
== Mechanicals ==
 
== Mechanicals ==
 +
 +
=== Rev 2 Mechanicals ===
 +
 +
[[file:LB-Z80-01_MECH_Rev2.PNG]]
 +
 +
=== Rev 1 Mechanicals ===
  
 
[[file:LB-Z80-01_MECH.PNG]]
 
[[file:LB-Z80-01_MECH.PNG]]
Line 206: Line 243:
 
== Checkout ==
 
== Checkout ==
  
 +
=== Rev 2 Checkout ===
  
 +
* Reset switch footprint is good
 +
* LED control worked with software update
 +
** Write 1 to address in range 0x0000-0x1FFF to turn LED on (command L1)
 +
** Write 0 to address in range 0x0000-0x1FFF to turn LED off (command L0)
 +
* Serial test software runs
 +
* MS BASIC doesn't work
  
 
=== Rev 2 Changes ===
 
=== Rev 2 Changes ===
Line 217: Line 261:
 
* Added bulk capacitor
 
* Added bulk capacitor
  
−
[[file:LB-65CXX-01_FRONT_REV2(BLK).png]]
+
[[file:LB-Z80-01_FRONT-Rev-2_3D.png]]
  
 
=== Rev 1 Checkout ===
 
=== Rev 1 Checkout ===

Latest revision as of 23:18, 14 October 2024

LB-Z80-01 P138-720px.jpg

Features

  • Z80 CPU
  • Oscillator 8 MHz nominal on card
  • Reset switch/power monitor
  • Address decoder PLD drives RAM/ROM/IO chip selects
  • 100x50mm card

Memory Map

  • 0x0000-0x1FFF 8KB ROM
  • 32KB or 56KB SRAM
    • 0x8000-0xFFFF Using LB-MEM-02 has 32 KB SRAM
    • 0x2000-0xFFFF Using LB-MEM-04 has 128KB or 512 KB of SRAM so 56 KB can be available
  • I/O
    • 0x00-0x7F - Free
    • 0x80-0x81 - Serial port (ACIA)

Design

CPU and Power Supervisor/Reset

LB-Z80-01 CPU Rev2.PNG

  • Z80 CPU
  • Oscillator 8 MHz nominal on card
  • Reset switch/power monitor

Z80 Register Set

Z80 Registers.PNG

Memory Access Timing

Z80 Mem Rd Wr.PNG

I/O Access Timing

Z80 IO Rd Wr.PNG

Oscillator

LB-Z80-01 OSC.PNG

  • 8MHZ or 10 MHz oscillator

PLD

LB-Z80-01 PLD Rev2.PNG

PLD Listing

Name       LB-Z80-01_PLD;
Partno     ATF16V8B;
Date       10/14/24;
Revision   02;
Designer   DOUG G;
Company    LAND BOARDS LLC;
Assembly   LB-Z80-01_U2;
Location   Rustbelt, US;
Device     G16V8;

/* Rev 2 PCB
*/


/* Control inputs */
PIN    1   = CLK;
PIN    2   = CPUA13;
PIN    3   = CPUA14;
PIN    4   = CPUA15;
PIN    5   = !MREQ;
PIN    6   = !IORQ;
PIN    7   = !M1;
PIN    8   = !CPURD;
PIN    9   = !CPUWR;
PIN    11  = CPUD0;

/* Address Decode and Chip Select outputs */
PIN    13  = !ROMCS;
PIN    14  = !IOCS;
PIN    15  = !RAMCS;
PIN    16  = !MEMRD;
/* PIN    17  = !WAIT; */
PIN    18  = LED;

ROMCS = !CPUA15 & !CPUA14 & !CPUA13 & MREQ & CPURD;

/* 56KB SRAM */
/*
RAMCS = CPUA15 & MREQ
#       CPUA14 & MREQ
#       CPUA13 & MREQ;
*/

/* 32KB SRAM */
RAMCS = CPUA15 & MREQ;

IOCS = !M1 & IORQ;

/*
WAIT = !MREQ # !IORQ;
*/

MEMRD = CPURD;

LED =     !CPUA15 & !CPUA14 & !CPUA13 & MREQ & CPUWR & CPUD0
# LED & !(!CPUA15 & !CPUA14 & !CPUA13 & MREQ & CPUWR);

Backplane Connector

LB-Z80-01 BKPL.PNG

Software

Assembly Language Toolchain

ACIA Loopback Test Code

  • AciaTest.asm - Source code
  • Type a character, get it back
    • 115,200 baud, 1 stop bit, no parity
  • Works

String Test Code

  • StringTest.asm - Source code
  • String write code
  • Includes loopback code
  • Works

String Read/Interpreter Code

  • ReadStringTest.asm - Source code
  • Adds a string read function
  • Adds an interpreter skeleton
  • Works with Rev 1 card
  • Added LED command (Rev 2 card)
    • L0 - Turn off the LED
    • L1 - Turn on the LED
  • Works with Rev 2 card

NASCOM 2 BASIC

NASCOM BOOT.PNG

Short Test Program

10 I=0
20 PRINTI:I=I+1:GOTO 20

Build Details

  • TASM assembler (see above)
  • S Record and Hex file manipulation
  • Adds srec_cat to combine files into one Intel Hex file
    • Combine int32k.hex and BAS32K.HEX into rom32.hex using srec-cat
    • Command line
      • srec_cat.exe int32k.hex -Intel BAS32K.HEX -Intel -fill 0xff 0x0144 0x014f -o rom32.hex -Intel
  • _ASSEMBLE.BAT - double-click in Windows to run the assembly if needed

NASCOM BASIC - Code Repository

Source files

  • intmini.asm - the interupt driven mini startup program needed to boot into BASIC
  • basic.asm - BASIC 4.7b - a conversion of Microsoft BASIC 4.7, as used on the Nascom computers (see below for details)

Output files

  • List files
    • INTMINI.LST
    • BASIC.LST
  • Hex files
    • INTMINI.HEX
    • BASIC.HEX
    • ROM32.HEX - the complete 8K ROM ready for burning to an EPROM
      • The unused contents are filled with FF values.
      • Within the ROM, the serial handler is first (starting at address 0000H), followed by the BASIC interpreter (starting at 0100H).
  • Hex file format

IntelHexRecordFormat.png

Acknowledgements

  • BASIC is Microsoft BASIC 4.7 for the NASCOM, heavily modified by Grant to remove references to different monitors, screen handlers and keyboard matrix reading
  • TASM assembler is a partial distribution of the package from Speech Technology Incorporated

Software Development Tools

References

ASCII TABLE.PNG

Mechanicals

Rev 2 Mechanicals

LB-Z80-01 MECH Rev2.PNG

Rev 1 Mechanicals

LB-Z80-01 MECH.PNG

Checkout

Rev 2 Checkout

  • Reset switch footprint is good
  • LED control worked with software update
    • Write 1 to address in range 0x0000-0x1FFF to turn LED on (command L1)
    • Write 0 to address in range 0x0000-0x1FFF to turn LED off (command L0)
  • Serial test software runs
  • MS BASIC doesn't work

Rev 2 Changes

  • Fixed resistor silkscreen values
  • Re-sequenced resistor reference designator
  • Made reset switch right angle
  • Add LED and resistor to PLD pin 15
  • Add CPUD0 to PLD pin 11
  • Added bulk capacitor

LB-Z80-01 FRONT-Rev-2 3D.png

Rev 1 Checkout

  • Didn't use silkscreen values, used
    • R1 = 4.7K
    • Other resistors are 10K
  • Z80 nop tester nop = 0x00
    • Refresh complicates this
  • Made C2 a bulk cap (100uF)

Assembly Sheet

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