Difference between revisions of "LB-68B50-02"
Jump to navigation
Jump to search
Blwikiadmin (talk | contribs) (Created page with "file:LB-6850-02_FRONT_REV2(BLK).png == Features == * Serial/Parallel I/O Card * 68B50 UART * 1.8432 MHz oscillator ** Baud Rate Clock (115,200 baud oscillator) * Control...") |
Blwikiadmin (talk | contribs) |
||
| Line 1: | Line 1: | ||
| − | [[file:LB-6850- | + | [[file:LB-6850-02_FRONT_REV1(BLK).png]] |
== Features == | == Features == | ||
Revision as of 23:39, 24 August 2024
.png)
Contents
Features
- Serial/Parallel I/O Card
- 68B50 UART
- 1.8432 MHz oscillator
- Baud Rate Clock (115,200 baud oscillator)
- Control PLD
- 100x50mm card
Design
ACIA
- 68B50 UART
- Baud Rate Clock (115,200 baud oscillator)
J2 - FTDI Header (Rev 2)
- 5V levels
- Pinout
- GND
- CTS (in)
- VCC
- TX (out)
- RX (in)
- RTS (out)
Backplane
Mechanicals
Rev 2
- Move J3 GND, VCC silkscreen over
Rev 1
Checkout
Rev 1
.png){kind=link}
