Difference between revisions of "LB-Z80-01"

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* [http://searle.x10host.com/z80/SimpleZ80_32K.html Grant Searle's 32KB SRAM version]
 
* [http://searle.x10host.com/z80/SimpleZ80_32K.html Grant Searle's 32KB SRAM version]
** Need to use Grant's 32KB version if the [[LB-MEM-01]] card is used
+
** Need to use Grant's 32KB version if the [[LB-MEM-02]] card is used
 
** Can use [http://searle.x10host.com/z80/SimpleZ80.html Grant's 56KB version] if the [[LB-MEM-03]] card is used
 
** Can use [http://searle.x10host.com/z80/SimpleZ80.html Grant's 56KB version] if the [[LB-MEM-03]] card is used
  

Revision as of 16:04, 19 September 2024

LB-Z80 P1090715-720px.jpg

Features

  • Z80 CPU
  • Oscillator 8 MHz nominal on card
  • Reset switch/power monitor
  • Address decoder PLD drives RAM/ROM/IO chip selects
  • 100x50mm card

Memory Map

  • 0x0000-0x1FFF 8KB ROM
  • 0x2000-0xFFFF 56KB SRAM
    • LB-MEM-02 has 32 KB ARAM w/ 24KB
    • LB-MEM-03 has 128KB or 512 KB of SRAM so 56 KB can be available
  • I/O
    • 0x00-0x7F - Free
    • 0x80-0x81 - Serial port (ACIA)

Design

CPU and Power Supervisor/Reset

LB-Z80-01 CPU.PNG

  • Z80 CPU
  • Oscillator 8 MHz nominal on card
  • Reset switch/power monitor

Memory Access Timing

Z80 Mem Rd Wr.PNG

I/O Access Timing

Z80 IO Rd Wr.PNG

Oscillator

LB-Z80-01 OSC.PNG

  • 8MHZ or 10 MHz oscillator

PLD

LB-Z80-01 PLD.PNG

PLD Listing

Name       LB-Z80-01_PLD;
Partno     ATF16V8B;
Date       09/17/20;
Revision   01;
Designer   DOUG G;
Company    LAND BOARDS LLC;
Assembly   LB-Z80-01_U2;
Location   Rustbelt, US;
Device     G16V8;

/*
*/


/* Control inputs */
PIN    1   = CLK;
PIN    2   = CPUA13;
PIN    3   = CPUA14;
PIN    4   = CPUA15;
PIN    5   = !MREQ;
PIN    6   = !IORQ;
PIN    7   = !M1;
PIN    8   = !CPURD;
PIN    9   = !CPUWR;

/* Address Decode and Chip Select outputs */
PIN    13  = !ROMCS;
PIN    14  = !IOCS;
PIN    16  = !MEMRD;
PIN    15  = !RAMCS;
PIN    18  = !WAIT;

ROMCS = !CPUA15 & !CPUA14 & !CPUA13 & MREQ & CPURD;

RAMCS = CPUA15 & MREQ
#       CPUA14 & MREQ
#       CPUA13 & MREQ;

IOCS = !M1 & IORQ;

WAIT = !MREQ # !IORQ;

MEMRD = CPURD;

Backplane Connector

LB-Z80-01 BKPL.PNG

Software

Register Set

Z80 Registers.PNG

Assembler files (for Windows/DOS)

  • _ASSEMBLE.BAT - double-click in Windows to run the assembly if needed
  • TASM.EXE
  • TASM80.TAB

Nascom 2 Computer BASIC

  • Microsoft BASIC 4.7 modified to remove all hardware-specific code

Source files

  • intmini.asm - the interupt driven mini startup program needed to boot into BASIC
  • basic.asm - BASIC 4.7b - a conversion of Microsoft BASIC 4.7, as used on the Nascom computers (see below for details)

Output files

  • INTMINI.HEX
  • BASIC.HEX
  • ROM.HEX - the complete 8K ROM ready for burning to an EPROM - the unused contents are filled with FF values.
  • Within the ROM, the serial handler is first (starting at address 0000H), followed by the BASIC interpreter (starting at 0100H).

Assembler files (for Windows/DOS)

  • _ASSEMBLE.BAT - double-click in Windows to run the assembly if needed
  • TASM.EXE
  • TASM80.TAB

Acknowledgements

  • BASIC is Microsoft BASIC 4.7 for the NASCOM, heavily modified by Grant to remove references to different monitors, screen handlers and keyboard matrix reading
  • TASM assembler is a partial distribution of the package from Speech Technology Incorporated

References

ASCII TABLE.PNG

Mechanicals

LB-Z80-01 MECH.PNG

Checkout

Rev 1

  • Didn't use silkscreen values, used
    • R1 = 4.7K
    • Other resistors are 10K
  • Z80 nop tester nop = 0x00
    • Refresh complicates this

Assembly Sheet