SIMPLE-Z80

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Revision as of 17:30, 12 September 2022 by Blwikiadmin (talk | contribs) (→‎Headers)
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CPU-z80 REV1 FRONT (BLK).png

Features

  • Build of Grant Searles's Simple Z80 CPU
    • Runs BASIC
  • Z80 CPU
  • 7.3728 MHz clock
  • 56KB SRAM (uses 128KB parts)
  • 8KB EPROM/EEPROM
  • 68B50 Serial Port (ACIA)
    • RS-232 port
    • Header for FTDI
    • 115,200 baud
  • Reset switch with optional Power Supervisor
  • 95x95mm card
  • (4) 6-32 mounting holes

Memory Map

  • 0x0000-0x1FFF 8KB ROM
  • 0x2000-0xFFFF 56KB SRAM
  • I/O
    • 0x00-0x7F - Free
    • 0x80-0x81 - Serial port (ACIA)

Headers

Connectors

J1 - RS-232 Serial

  1. N/C
  2. Receive
  3. Transmit
  4. Loop to pin 6
  5. GND
  6. Loop to pin 4
  7. RTS
  8. N/C
  9. N/C

J3 - FTDI / TTL Serial

  1. GND
  2. RTS* (out)
  3. +5V
  4. Receive (in)
  5. Transmit (out)
  6. N/C

J4 - 5V Power

  • 2x4 header

Mechanicals

SIMPLE-Z80 REV1 MECHS.PNG

Assembly Sheet

SIMPLE-Z80 Rev 1 Assembly Sheet

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