Difference between revisions of "SIMPLE-68008"

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−
[[FILE:SIMPLE-68008_FRONT_3D.png]]
+
[[FILE:SIMPLE-68008_P475-720px.jpg]]
  
 
== Features ==
 
== Features ==
  
−
* 68008 CPU
+
* [https://en.wikipedia.org/wiki/Motorola_68008 68008 CPU]
 +
** 20 bit address space (1MB total)
 
* 10 MHz clock
 
* 10 MHz clock
−
* 512KB SRAM
+
* 128KB/512KB SRAM
−
* Up to 448B EPROM/EEPROM
+
* Up to 448KB EPROM/EEPROM
 
* 68681 Dual Serial Port (ACIA)
 
* 68681 Dual Serial Port (ACIA)
 
** Headers for FTDI
 
** Headers for FTDI
 
** 38,400 baud
 
** 38,400 baud
 
* Reset switch with optional Power Supervisor
 
* Reset switch with optional Power Supervisor
 +
* 5V operation
 +
** 375 mA nominal
 
* 95x95mm card
 
* 95x95mm card
 
* (4) 6-32 mounting holes
 
* (4) 6-32 mounting holes
Line 16: Line 19:
 
=== Memory Map ===
 
=== Memory Map ===
  
−
* 0x00000-0x7FFFF 32KB SRAM
+
* The memory map depends on two things
−
* 0x80000-0x8FFFF Serial (ACIA)
+
** Mapping in the PLDs
−
* 0x99000-0xFFFFF Up to 8KB EPROM
+
** The firmware that is being run on the card
 +
 
 +
==== Maximal Capacity Design ====
 +
 
 +
* 0x00000-0x7FFFF 512KB SRAM
 +
* 0x80000-0xEFFFF Up to 448KB EPROM (minus DUART I/O space)
 +
* 0xF0000-0xFFFFF Serial (ACIA)
 +
 
 +
=== Chip Set ===
 +
 
 +
* [https://www.ebay.com/itm/113047590718 On Ebay]
 +
 
 +
[[file:EBAY_68000_SET.jpg]]
 +
 
 +
==== Parts in "Kit" ====
 +
 
 +
* MC68000P10 - 68K CPU with 16-bit data bus and 24-bit address bus
 +
* MC68230P8 - Parallel I/O bits, timer
 +
* TMP68681P - Dual UART, 8-bit I/O, 6-bit I/O
 +
* MC68901P - Multifunction (8 I/O pins, interrupt controller, (4) timers, UART
 +
* AM8511A - Floating Point Unit
 +
* MC68008P10 - 68K CPU with 8-bit data bus and 20-bit address bus
 +
* 65B50P - ACIA (Serial interface)
  
 
== Design ==
 
== Design ==
  
−
* CPU
+
=== CPU ===
 +
 
 +
The Motorola 68008 is an 8/32-bit microprocessor introduced by Motorola in 1982. It is a version of 1979's Motorola 68000 with an 8-bit external data bus, as well as a smaller address bus. The 68008 was available with 20 address lines (48-pin package) which allowed 1 MB address space versus the 16 MB addressable on the 68000.
  
 
[[file:SIMPLE-68008_U5_CPU.PNG]]
 
[[file:SIMPLE-68008_U5_CPU.PNG]]
  
−
* EPROM
+
==== CPU Timing ====
 +
 
 +
[[file:CPU_Timing-A01.PNG]]
 +
 
 +
[[file:CPU_Timing-B01.PNG]]
 +
 
 +
==== Function Code ====
 +
 
 +
[[file:CPU_Function_Codes.PNG]]
 +
 
 +
=== EPROM ===
  
 
[[file:SIMPLE-68008_U8_EPROM.PNG]]
 
[[file:SIMPLE-68008_U8_EPROM.PNG]]
  
−
* SRAM
+
* SST27C256 EEPROM
 +
** 32 KB part
 +
** 28 pin part, 32 pin socket
 +
==== Flash Memory (EEPROM) Programming ====
 +
 
 +
* Program using [[TL866ii_Plus_Programmer|TL-866ii plus programmer]]
 +
* Select device type
 +
** Using SST 27SF256 part (Part is 32 KB)
 +
* File Open
 +
* Select file = [https://github.com/douggilliland/Linux-68k/blob/master/S68K_001/S68K_001.hex S68K_001.hex]
 +
* File format: INTEL_HEX
 +
* To Region: Default
 +
* Set EPROM offset when file is loaded to accommodate memory map offsets for EPROM space
 +
** Set From File Start Addr(Hex) to '''80000'''
 +
** To Buffer Start Addr(Hex) to 00000 (should be already that value)
 +
 
 +
[[file:SIMPLE-68008_EEPROM_Programmer-02.PNG]]
 +
 
 +
* Got Device ID error
 +
** Turn off ID checkbox in the Options section (bottom left of window)
 +
* Device programmed/verified
 +
* Memory Buffer should look like
 +
 
 +
[[file:SIMPLE-68008_EEPROM_Programmer.PNG]]
 +
 
 +
=== SRAM ===
  
 
[[file:SIMPLE-68008_U7_SRAM.PNG]]
 
[[file:SIMPLE-68008_U7_SRAM.PNG]]
  
−
* Dual UART
+
* Using 512 KB SRAM
 +
** Wire jumper H6-2 to H6-3 on rear of card
 +
 
 +
=== Dual UART ===
  
 
[[file:SIMPLE-68008_U6_DUART.PNG]]
 
[[file:SIMPLE-68008_U6_DUART.PNG]]
  
−
* Reset
+
=== Reset ===
  
 
[[file:SIMPLE-68008_U4_RESET.PNG]]
 
[[file:SIMPLE-68008_U4_RESET.PNG]]
  
−
* Clock
+
=== Clock ===
  
 
[[file:SIMPLE-68008_U1_OSC.PNG]]
 
[[file:SIMPLE-68008_U1_OSC.PNG]]
  
−
* PLDs
+
=== PLDs ===
  
−
[[file:SIMPLE-68008_U2_U3_PLDS.PNG]]
+
* Two ATF16V8B PLDs [https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-0364-PLD-ATF16V8B-8BQ-8BQL-Datasheet.pdf (Datasheet)]
 +
* [https://www.microchip.com/en-us/development-tool/WinCUPL WinCupl compiler]
 +
** [https://www.microchip.com/en-us/products/fpgas-and-plds/spld-cplds/pld-design-resources WinCupl Download link]
 +
* Program using [[TL866ii_Plus_Programmer|TL-866ii plus programmer]]
  
−
=== PLDs ===
+
[[file:PLD_Programming_TL866.PNG]]
  
−
<pre>
 
 
==== PLD_001 ====
 
==== PLD_001 ====
  
 +
[[file:SIMPLE-68008_PLD_001.png]]
 +
 +
===== PLD_001 Source Listing =====
 +
 +
* [https://raw.githubusercontent.com/land-boards/lb-boards/master/RetroCPUs/SIMPLE-68008/LOGIC/SIMPLE-68008_PLD_1/SIMPLE-68008_PLD_1.PLD Source file]
 +
* [https://raw.githubusercontent.com/land-boards/lb-boards/master/RetroCPUs/SIMPLE-68008/LOGIC/SIMPLE-68008_PLD_1/SIMPLE-68008_PLD_1.jed JEDEC Programming file]
 +
 +
<pre>
 
Name      SIMPLE-68008_PLD_1;
 
Name      SIMPLE-68008_PLD_1;
 
Partno    ATF16V8B;
 
Partno    ATF16V8B;
−
Date      09/14/22;
+
Date      06/19/24;
 
Revision  01;
 
Revision  01;
 
Designer  DOUG G;
 
Designer  DOUG G;
 
Company    LAND BOARDS LLC;
 
Company    LAND BOARDS LLC;
 
Assembly  U02;
 
Assembly  U02;
−
Location  CONNELLSVILLE PA;
+
Location  RUSTBELT, USA;
 
Device    G16V8;
 
Device    G16V8;
  
Line 80: Line 155:
 
PIN    11  = CPUFC2;
 
PIN    11  = CPUFC2;
 
PIN    12  = !DDTACK;
 
PIN    12  = !DDTACK;
−
PIN    13  = !SWAP;
+
PIN    13  = SWAP;
  
 
/* Outputs */
 
/* Outputs */
Line 90: Line 165:
 
PIN    19  = WAIT2;
 
PIN    19  = WAIT2;
  
−
CPUIACK = CPUFC2 & CPUFC1 & CPUFC0;
+
CPUIACK = CPUFC2 & CPUFC1 & CPUFC0 & CPUDS;
  
−
DUARTCS = CPUA19 & !CPUA18 & !CPUA17 & !CPUA16 & CPUDS;
+
DUARTCS = CPUA19 & CPUA18 & CPUA17 & CPUA16 & CPUDS & !CPUFC1 &  CPUFC0;
  
−
RAMSEL = !CPUA19 & SWAP & CPUDS;
+
RAMSEL = !CPUA19 & SWAP & CPUDS & !CPUFC1 &  CPUFC0  /* User/Super Data */
 +
#        !CPUA19 & SWAP & CPUDS &  CPUFC1 & !CPUFC0; /* User/Super Program */
 +
 
 +
CPUDTACK =  CPUA19 & CPUA18 & CPUA17 & CPUA16 & CPUDS & DDTACK /* DUART */
 +
#          CPUA19 & !CPUA18 & CPUDS /* EPROM */
 +
#          CPUA19 & !CPUA17 & CPUDS /* EPROM */
 +
#          CPUA19 & !CPUA16 & CPUDS /* EPROM */
 +
#          !CPUA19 & CPUDS; /* RAM */
  
−
CPUDTACK =  CPUA19 & !CPUA18 & !CPUA17 & !CPUA16 & CPUDS & !DDTACK
 
−
#          CPUA19 & CPUA18 & CPUDS
 
−
#          CPUA19 & CPUA17 & CPUDS
 
−
#          CPUA19 & CPUA16 & CPUDS
 
−
#          !CPUA19 & CPUDS;
 
 
</pre>
 
</pre>
  
 +
==== PLD_002 ====
  
−
==== PLD_002 ====
+
[[file:SIMPLE-68008_PLD_002.png]]
 +
 
 +
===== PLD_002 Source Listing =====
  
 +
* [https://raw.githubusercontent.com/land-boards/lb-boards/master/RetroCPUs/SIMPLE-68008/LOGIC/SIMPLE-68008_PLD_2/SIMPLE-68008_PLD_2.PLD Source file]
 +
* [https://raw.githubusercontent.com/land-boards/lb-boards/master/RetroCPUs/SIMPLE-68008/LOGIC/SIMPLE-68008_PLD_2/SIMPLE-68008_PLD_2.jed JEDEC Programming file]
 
<pre>
 
<pre>
 
Name      SIMPLE-68008_PLD_2;
 
Name      SIMPLE-68008_PLD_2;
 
Partno    ATF16V8B;
 
Partno    ATF16V8B;
−
Date      09/14/22;
+
Date      06/19/24;
 
Revision  01;
 
Revision  01;
 
Designer  DOUG G;
 
Designer  DOUG G;
 
Company    LAND BOARDS LLC;
 
Company    LAND BOARDS LLC;
 
Assembly  U03;
 
Assembly  U03;
−
Location  CONNELLSVILLE, PA;
+
Location  RUSTBELT, USA;
 
Device    G16V8;
 
Device    G16V8;
  
Line 133: Line 215:
  
 
/* Outputs */
 
/* Outputs */
 +
PIN   13  = SWAPADR;
 
PIN    14  = SWAP;
 
PIN    14  = SWAP;
 
PIN    15  = !ROMCS;
 
PIN    15  = !ROMCS;
Line 140: Line 223:
  
 
/* CLEAR SWAP AT POWER UP, RESET */
 
/* CLEAR SWAP AT POWER UP, RESET */
−
/* SET SWAP BY FIRST WRITE TO EPROM SPACE */
+
/* SET SWAP BY 1ST WR TO START OF EPROM SPACE */
−
SWAP.D = CPUDS &  CPUWR & CPUA19 & CPUA18 & CPUA17 & CPUA16 & CPUD0 & !POR
+
/* SWAP.CK = CLK; */
−
#       SWAP  & !POR;
+
/* SWAP.AR = POR; */
 +
 
 +
MEMRD = !CPUWR & CPUDS & !CPUA19
 +
#      !CPUWR & CPUDS &  CPUA19 & !CPUA18
 +
#      !CPUWR & CPUDS &  CPUA19 & !CPUA17
 +
#      !CPUWR & CPUDS &  CPUA19 & !CPUA16;
 +
 
 +
SWAP = CPUDS &  CPUWR & CPUA19 & !CPUA18 & !CPUA17 & !CPUA16 & CPUD0 & !POR
 +
#     SWAP  & !POR;
 +
 
 +
SWAPADR = CPUDS & CPUWR & CPUA19 & !CPUA18 & !CPUA17 & !CPUA16;
  
−
ROMCS = CPUDS & !CPUWR & CPUA19 & CPUA18
+
ROMCS = CPUDS & !CPUWR & CPUA19 & !CPUA18
−
#      CPUDS & !CPUWR & CPUA19 & CPUA17
+
#      CPUDS & !CPUWR & CPUA19 & !CPUA17
−
#      CPUDS & !CPUWR & CPUA19 & CPUA16
+
#      CPUDS & !CPUWR & CPUA19 & !CPUA16
 
#      CPUDS & !CPUA19 & !CPUA18 & !CPUA17 & !CPUA16 & !SWAP;
 
#      CPUDS & !CPUA19 & !CPUA18 & !CPUA17 & !CPUA16 & !SWAP;
  
−
CPUHLT_N.OE = POR;
+
CPUHLT.OE = POR;
−
CPUHLT_N = POR;
+
CPUHLT = POR;
  
−
CPURES_N.OE = POR;
+
CPURES.OE = POR;
−
CPURES_N = POR;
+
CPURES = POR;
 
</pre>
 
</pre>
  
Line 200: Line 293:
 
* 2x4 header
 
* 2x4 header
  
−
=== H3-H5 - EPROM/EEPROM Select Jumpers ===
+
=== H2-H5 - EPROM/EEPROM Select Jumpers ===
 +
 
 +
[[file:SIMPLE-68008_REV1_EEP_JUMPERS.PNG]]
  
 
* H2 = EE PIN 31
 
* H2 = EE PIN 31
Line 206: Line 301:
 
* H4 = EE PIN 30
 
* H4 = EE PIN 30
 
* H5 = EE PIN 29
 
* H5 = EE PIN 29
 +
 +
==== 27SF256 ====
 +
 +
* 27SF256 is a 28 pin part, socket is 32 pins
 +
** H2 = Not installed
 +
** H3-1 to H3-2 = installed (Vpp = 5V)
 +
** H4-1 to H4-2 = Vcc
 +
** H5-2 to H5-3 = CPUA14
 +
 +
==== EEPROM Jumpers ====
  
 
{| class="wikitable"
 
{| class="wikitable"
Line 550: Line 655:
 
|}
 
|}
  
−
== Software ==
+
=== H6 - SRAM Configuration ===
 +
 
 +
* 1-2 = 128KB SRAM
 +
* 2-3 = 512KB SRAM
 +
* 128KB and 512KB Parts are about the same price so there's not much point (if buying parts anyway) with going with 512KB part
 +
** [https://www.mouser.com/Search/Refine?Keyword=913-AS6C4008-55PCN AS6C4008-55PCN] is $6.38 (2024-06)
 +
** [https://www.mouser.com/Search/Refine?Keyword=913-AS6C1008-55PCN AS6C1008-55PCN] is $2.91 (2024-06)
 +
 
 +
== SIMPLE-68008 Software ==
 +
 
 +
* 68000 code development is done with [https://github.com/douggilliland/Linux-68k/wiki/68000-Software-Development-Toolchain cross assemblers/compilers using GCC tools under Linux]
 +
 
 +
=== Linux Development Environment ===
 +
 
 +
[[FILE:SIMPLE-68008_VM_Vbox.PNG]]
 +
 
 +
* Using Oracle VM VirtualBox
 +
* Running Linux Mint
 +
* The GNU C-Compiler with Binutils and other useful tools for 68000 cross development
 +
* This is a Makefile based approach to build the toolchain to reduce the build time.
 +
* The original work was by Steve Moody [https://github.com/SteveMoody73/m68k-elf-toolchain Moody's page]
 +
* These tools are build:
 +
** binutils
 +
** gcc with libs for C/C++/ObjC
 +
** vasm
 +
** vbcc
 +
** vlink
 +
** newlib
 +
 
 +
=== Code ===
 +
 
 +
* [https://github.com/douggilliland/Linux-68k/tree/master/S68K_001 Test Code]
 +
* Set up stack, starting address
 +
* Initialize DUART
 +
* Input/Output Serial routines
 +
* Loop forever
 +
 
 +
==== Makefile ====
 +
 
 +
<pre>
 +
all: S68K_001.hex S68K_001.bin
 +
 
 +
S68K_001.o: S68K_001.s
 +
/opt/m68k-elf/bin/m68k-elf-as -m68000 -alms -a=S68K_001.lst -o S68K_001.o S68K_001.s
 +
 
 +
S68K_001.bin: S68K_001.o
 +
/opt/m68k-elf/bin/m68k-elf-objcopy -O binary S68K_001.o S68K_001.bin
 +
 
 +
S68K_001.hex: S68K_001.o
 +
/opt/m68k-elf/bin/m68k-elf-objcopy -O srec S68K_001.o S68K_001.tmp
 +
srec_cat S68K_001.tmp --crop 0x80000 0x80fff -o S68K_001.sre
 +
srec_cat S68K_001.tmp --crop 0x80000 0x80fff -o S68K_001.hex -Intel
 +
# rm S68K_001.tmp
 +
 
 +
clean:
 +
$(RM) S68K_001.lst S68K_001.o S68K_001.bin S68K_001.sre S68K_001.hex S68K_001.tmp
 +
</pre>
 +
 
 +
==== TUTOR Monitor ====
 +
 
 +
* [https://github.com/douggilliland/Retro-Computers/tree/master/68000/TS2_FPGA/Tutor TUTOR 1.2 Monitor]
 +
** Addressing issues due to code being designed for ROM at below 64K
 +
 
 +
==== 68k-Monitor ====
 +
 
 +
* [https://github.com/ChartreuseK/68k-Monitor/blob/master/Monitor-Simple.x68 ChartreusK 68K monitor] = 68901 DUART code
  
 
== Mechanicals ==
 
== Mechanicals ==
  
 
[[FILE:SIMPLE-68008_REV1_MECHS.PNG]]
 
[[FILE:SIMPLE-68008_REV1_MECHS.PNG]]
 +
 +
== Checkout ==
 +
 +
* Rev 1 card working with no wires
 +
** Reset working
 +
*** Reset switch and monitor working
 +
** Clock working
 +
** EPROM working
 +
** SRAM working
 +
** Checked Serial port
 +
*** Not using any XTAL capacitors
  
 
== Assembly Sheet ==
 
== Assembly Sheet ==
  
−
[[SIMPLE-68008 Rev 1 Assembly Sheet]]
+
=== Rev 1 ===
 +
 
 +
* [[SIMPLE-68008 Rev 1 Assembly Sheet]]
 +
* [http://land-boards.com/SIMPLE-68008/SIMPLE-68008_Rev1_ibom.html SIMPLE-68008 Rev 1 Interactive BOM]

Latest revision as of 20:27, 23 June 2024

SIMPLE-68008 P475-720px.jpg

Features

  • 68008 CPU
    • 20 bit address space (1MB total)
  • 10 MHz clock
  • 128KB/512KB SRAM
  • Up to 448KB EPROM/EEPROM
  • 68681 Dual Serial Port (ACIA)
    • Headers for FTDI
    • 38,400 baud
  • Reset switch with optional Power Supervisor
  • 5V operation
    • 375 mA nominal
  • 95x95mm card
  • (4) 6-32 mounting holes

Memory Map

  • The memory map depends on two things
    • Mapping in the PLDs
    • The firmware that is being run on the card

Maximal Capacity Design

  • 0x00000-0x7FFFF 512KB SRAM
  • 0x80000-0xEFFFF Up to 448KB EPROM (minus DUART I/O space)
  • 0xF0000-0xFFFFF Serial (ACIA)

Chip Set

EBAY 68000 SET.jpg

Parts in "Kit"

  • MC68000P10 - 68K CPU with 16-bit data bus and 24-bit address bus
  • MC68230P8 - Parallel I/O bits, timer
  • TMP68681P - Dual UART, 8-bit I/O, 6-bit I/O
  • MC68901P - Multifunction (8 I/O pins, interrupt controller, (4) timers, UART
  • AM8511A - Floating Point Unit
  • MC68008P10 - 68K CPU with 8-bit data bus and 20-bit address bus
  • 65B50P - ACIA (Serial interface)

Design

CPU

The Motorola 68008 is an 8/32-bit microprocessor introduced by Motorola in 1982. It is a version of 1979's Motorola 68000 with an 8-bit external data bus, as well as a smaller address bus. The 68008 was available with 20 address lines (48-pin package) which allowed 1 MB address space versus the 16 MB addressable on the 68000.

SIMPLE-68008 U5 CPU.PNG

CPU Timing

CPU Timing-A01.PNG

CPU Timing-B01.PNG

Function Code

CPU Function Codes.PNG

EPROM

SIMPLE-68008 U8 EPROM.PNG

  • SST27C256 EEPROM
    • 32 KB part
    • 28 pin part, 32 pin socket

Flash Memory (EEPROM) Programming

  • Program using TL-866ii plus programmer
  • Select device type
    • Using SST 27SF256 part (Part is 32 KB)
  • File Open
  • Select file = S68K_001.hex
  • File format: INTEL_HEX
  • To Region: Default
  • Set EPROM offset when file is loaded to accommodate memory map offsets for EPROM space
    • Set From File Start Addr(Hex) to 80000
    • To Buffer Start Addr(Hex) to 00000 (should be already that value)

SIMPLE-68008 EEPROM Programmer-02.PNG

  • Got Device ID error
    • Turn off ID checkbox in the Options section (bottom left of window)
  • Device programmed/verified
  • Memory Buffer should look like

SIMPLE-68008 EEPROM Programmer.PNG

SRAM

SIMPLE-68008 U7 SRAM.PNG

  • Using 512 KB SRAM
    • Wire jumper H6-2 to H6-3 on rear of card

Dual UART

SIMPLE-68008 U6 DUART.PNG

Reset

SIMPLE-68008 U4 RESET.PNG

Clock

SIMPLE-68008 U1 OSC.PNG

PLDs

PLD Programming TL866.PNG

PLD_001

SIMPLE-68008 PLD 001.png

PLD_001 Source Listing
Name       SIMPLE-68008_PLD_1;
Partno     ATF16V8B;
Date       06/19/24;
Revision   01;
Designer   DOUG G;
Company    LAND BOARDS LLC;
Assembly   U02;
Location   RUSTBELT, USA;
Device     G16V8;

/*
*/

/* Inputs */
PIN    1   = CLK;
PIN    2   = !CPUAS;
PIN    3   = !CPUDS;
PIN    4   = CPUA16;
PIN    5   = CPUA17;
PIN    6   = CPUA18;
PIN    7   = CPUA19;
PIN    8   = CPUFC0;
PIN    9   = CPUFC1;
PIN    11  = CPUFC2;
PIN    12  = !DDTACK;
PIN    13  = SWAP;

/* Outputs */
PIN    14  = !CPUIACK;
PIN    15  = !DUARTCS;
PIN    16  = !CPUDTACK;
PIN    17  = WAIT1;
PIN    18  = !RAMSEL;
PIN    19  = WAIT2;

CPUIACK = CPUFC2 & CPUFC1 & CPUFC0 & CPUDS;

DUARTCS = CPUA19 & CPUA18 & CPUA17 & CPUA16 & CPUDS & !CPUFC1 &  CPUFC0;

RAMSEL = !CPUA19 & SWAP & CPUDS & !CPUFC1 &  CPUFC0  /* User/Super Data */
#        !CPUA19 & SWAP & CPUDS &  CPUFC1 & !CPUFC0; /* User/Super Program */

CPUDTACK =  CPUA19 & CPUA18 & CPUA17 & CPUA16 & CPUDS & DDTACK	/* DUART	*/
#           CPUA19 & !CPUA18 & CPUDS											/* EPROM	*/
#           CPUA19 & !CPUA17 & CPUDS											/* EPROM	*/
#           CPUA19 & !CPUA16 & CPUDS											/* EPROM	*/
#          !CPUA19 & CPUDS;															/* RAM 		*/

PLD_002

SIMPLE-68008 PLD 002.png

PLD_002 Source Listing
Name       SIMPLE-68008_PLD_2;
Partno     ATF16V8B;
Date       06/19/24;
Revision   01;
Designer   DOUG G;
Company    LAND BOARDS LLC;
Assembly   U03;
Location   RUSTBELT, USA;
Device     G16V8;

/*
	RESET CONTROLLER, ROM CHIP SELECT
*/

/* Inputs */
PIN    1   = CLK;
PIN    2   = !CPUWR;
PIN    3   = !CPUDS;
PIN    4   = CPUA16;
PIN    5   = CPUA17;
PIN    6   = CPUA18;
PIN    7   = CPUA19;
PIN    8   = !POR;
PIN    9   = CPUD0;

/* Outputs */
PIN	  13  = SWAPADR;
PIN    14  = SWAP;
PIN    15  = !ROMCS;
PIN    16  = !MEMRD;
PIN    18  = !CPUHLT;
PIN    19  = !CPURES;

/* CLEAR SWAP AT POWER UP, RESET	*/
/* SET SWAP BY 1ST WR TO START OF EPROM SPACE		*/
/* SWAP.CK = CLK; */
/* SWAP.AR = POR; */

MEMRD = !CPUWR & CPUDS & !CPUA19
#       !CPUWR & CPUDS &  CPUA19 & !CPUA18
#       !CPUWR & CPUDS &  CPUA19 & !CPUA17
#       !CPUWR & CPUDS &  CPUA19 & !CPUA16;

SWAP = CPUDS &  CPUWR & CPUA19 & !CPUA18 & !CPUA17 & !CPUA16 & CPUD0 & !POR
#      SWAP  & !POR;

SWAPADR = CPUDS & CPUWR & CPUA19 & !CPUA18 & !CPUA17 & !CPUA16;

ROMCS = CPUDS & !CPUWR & CPUA19 & !CPUA18
#       CPUDS & !CPUWR & CPUA19 & !CPUA17
#       CPUDS & !CPUWR & CPUA19 & !CPUA16
#       CPUDS & !CPUA19 & !CPUA18 & !CPUA17 & !CPUA16 & !SWAP;

CPUHLT.OE = POR;
CPUHLT = POR;

CPURES.OE = POR;
CPURES = POR;

Headers / Connectors

SIMPLE-68008 REV1 CAD.PNG

J1 - 2 port FTDI / TTL Serial

  1. GND
  2. CTS* (in)
  3. +5V
  4. Transmit (out)
  5. Receive (in)
  6. RTS* (out)

J2 - Input Port

  1. Input 2
  2. Input 5
  3. Input 4
  4. Input 3
  5. Vcc
  6. GND

J3 - Output Port

  1. GND
  2. Vcc
  3. Output 7
  4. Output 6
  5. Output 5
  6. Output 4
  7. Output 3
  8. Output 2

H1 - 5V Power

  • 2x4 header

H2-H5 - EPROM/EEPROM Select Jumpers

SIMPLE-68008 REV1 EEP JUMPERS.PNG

  • H2 = EE PIN 31
  • H3 = EE PIN 3
  • H4 = EE PIN 30
  • H5 = EE PIN 29

27SF256

  • 27SF256 is a 28 pin part, socket is 32 pins
    • H2 = Not installed
    • H3-1 to H3-2 = installed (Vpp = 5V)
    • H4-1 to H4-2 = Vcc
    • H5-2 to H5-3 = CPUA14

EEPROM Jumpers

27040 27020 27010 27512 27256 27128 2764 PIN(32) PIN(28) PIN(28) PIN(32) 2764 27128 27256 27512 27010 27020 27040
VPP VPP VPP N/A N/A N/A N/A 1 N/A N/A 32 N/A N/A N/A N/A VCC VCC VCC
A16 A16 A16 N/A N/A N/A N/A 2 N/A N/A 31 (H2) N/A N/A N/A N/A PGM PGM A18
A15 A15 A15 A15 VPP VPP VPP 3 (H3) 1 28 30 (H4) VCC VCC VCC VCC N/C A17 A17
A12 A12 A12 A12 A12 A12 A12 4 2 27 29 (H5) PGM PGM A14 A14 A14 A14 A14
A7 A7 A7 A7 A7 A7 A7 5 3 26 28 A13 A13 A13 A13 A13 A13 A13
A6 A6 A6 A6 A6 A6 A6 6 4 25 27 A8 A8 A8 A8 A8 A8 A8
A5 A5 A5 A5 A5 A5 A5 7 5 24 26 A9 A9 A9 A9 A9 A9 A9
A4 A4 A4 A4 A4 A4 A4 8 6 23 25 A11 A11 A11 A11 A11 A11 A11
A3 A3 A3 A3 A3 A3 A3 9 7 22 24 OE* OE* OE* OE* OE* OE* OE*
A2 A2 A2 A2 A2 A2 A2 10 8 21 23 A10 A10 A10 A10 A10 A10 A10
A1 A1 A1 A1 A1 A1 A1 11 9 20 22 CE* CE* CE* CE* CE* CE* CE*
A0 A0 A0 A0 A0 A0 A0 12 10 19 21 D7 D7 D7 D7 D7 D7 D7
D0 D0 D0 D0 D0 D0 D0 13 11 18 20 D6 D6 D6 D6 D6 D6 D6
D1 D1 D1 D1 D1 D1 D1 14 12 17 19 D5 D5 D5 D5 D5 D5 D5
D2 D2 D2 D2 D2 D2 D2 15 13 16 18 D4 D4 D4 D4 D4 D4 D4
GND GND GND GND GND GND GND 16 14 15 17 D3 D3 D3 D3 D3 D3 D3

H6 - SRAM Configuration

  • 1-2 = 128KB SRAM
  • 2-3 = 512KB SRAM
  • 128KB and 512KB Parts are about the same price so there's not much point (if buying parts anyway) with going with 512KB part

SIMPLE-68008 Software

Linux Development Environment

SIMPLE-68008 VM Vbox.PNG

  • Using Oracle VM VirtualBox
  • Running Linux Mint
  • The GNU C-Compiler with Binutils and other useful tools for 68000 cross development
  • This is a Makefile based approach to build the toolchain to reduce the build time.
  • The original work was by Steve Moody Moody's page
  • These tools are build:
    • binutils
    • gcc with libs for C/C++/ObjC
    • vasm
    • vbcc
    • vlink
    • newlib

Code

  • Test Code
  • Set up stack, starting address
  • Initialize DUART
  • Input/Output Serial routines
  • Loop forever

Makefile

all:	S68K_001.hex S68K_001.bin

S68K_001.o: S68K_001.s
	/opt/m68k-elf/bin/m68k-elf-as -m68000 -alms -a=S68K_001.lst -o S68K_001.o S68K_001.s

S68K_001.bin: S68K_001.o
	/opt/m68k-elf/bin/m68k-elf-objcopy -O binary S68K_001.o S68K_001.bin

S68K_001.hex: S68K_001.o
	/opt/m68k-elf/bin/m68k-elf-objcopy -O srec S68K_001.o S68K_001.tmp
	srec_cat S68K_001.tmp --crop 0x80000 0x80fff -o S68K_001.sre
	srec_cat S68K_001.tmp --crop 0x80000 0x80fff -o S68K_001.hex -Intel
#	rm S68K_001.tmp

clean:
	$(RM) S68K_001.lst S68K_001.o S68K_001.bin S68K_001.sre S68K_001.hex S68K_001.tmp

TUTOR Monitor

68k-Monitor

Mechanicals

SIMPLE-68008 REV1 MECHS.PNG

Checkout

  • Rev 1 card working with no wires
    • Reset working
      • Reset switch and monitor working
    • Clock working
    • EPROM working
    • SRAM working
    • Checked Serial port
      • Not using any XTAL capacitors

Assembly Sheet

Rev 1

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