IOP16 16-bit I/O CPU Design

16-bit I/O Processor Design

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Overview

This CPU is intended to be used as an I/O Processor. The CPU can be used as a Microcontroller replacement in many applications. It implemented in an FPGA. It is useful for offloading polled I/O or replacing CPUs in small applications. The majority of these applications deal with 8-bit data and that's where this CPU excels.

Features Set

• 16-bit CPU
  • Simple/consistent opcode bit fields
    • Instructions are always only 16-bits wide
  • 4-bit opcode
    • Some sub-instructions allow more than 16 instructions
  • 4-bit register field (shared with address/offset)
  • 8-bit constant (shared with address/offset)
• 12.5 MIPS (4 of 50 MHz FPGA clocks)
• Register File
  • 8 registers
    • Reserved space in instruction set for up to 16 registers
  • Registers are 8-bits

IOP16 Block Diagram

Instruction Set

• IOP16 Instructions Detail

Assembler

• Table driven Assembler
  • Input comes from a CSV file
  • Outputs .MIF and Listing files
    • MIF (Memory Initialization File) is Altera ROM initialization File

Hardware Requirements

• Targeted at an FPGA implementation
  • The CPU could easily be run on pretty much any FPGA
  • Coded in VHDL
• Very small LUT/Memory footprint in FPGA
  • Uses 226 logic cells in an Altera EP4 FPGA
  • Requires a minimum 2 of 1K SRAM blocks (depends on program size)
    • Trade-off - SRAM could be replaced with logic cells (in theory)

Target Hardware

• The initial targeted hardware is the QMTECH EP4CE15 FPGA card
  • This FPGA is inexpensive and powerful
  • The CPU takes up very little of the resources of the FPGA

<img src="https://raw.githubusercontent.com/douggilliland/Design_A_CPU/main/Docs/CycloneIV_Starter_Kit_P528-cropped.jpg?token=AALUDDTXH4AAMPMJKRVL2LDA5BCOI"></img>

• https://github.com/ChinaQMTECH/CYCLONE_IV_STARTER_KIT QMTECH CYCLONE IV STARTER KIT GitHub]
  • QMTECH FPGA Files Reflector
• QMTECH EP4CE15 FPGA card - AliExpress page

Peripheral Support

• Extensive Peripheral Support
• 8-bit address (controls up to 256 peripherals)
• 8-bit data
• Read strobe (a couple of clocks wide)
• Write strobe (a couple of clocks wide)

Code Examples

• IOP16 Code Examples

External References

• Hackaday.io page.
• YouTube Video Series.

Example Applications

• Hackaday ANSI Terminal in an FPGA
• Design a CPU - GitHub