Difference between revisions of "IOP16 16-bit I/O CPU Design"
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[https://www.youtube.com/watch?v=ZtEJHF-pVU0&list=PLn__0BqzWEWNspQ0xkG5h-oSJ21EAet8H Video PlayList] | [https://www.youtube.com/watch?v=ZtEJHF-pVU0&list=PLn__0BqzWEWNspQ0xkG5h-oSJ21EAet8H Video PlayList] | ||
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| + | == Example Applications == | ||
* [https://hackaday.io/project/180415-ansi-terminal-in-an-fpga Hackaday ANSI Terminal in an FPGA] | * [https://hackaday.io/project/180415-ansi-terminal-in-an-fpga Hackaday ANSI Terminal in an FPGA] | ||
* [https://github.com/douggilliland/Design_A_CPU Design a CPU] - GitHub | * [https://github.com/douggilliland/Design_A_CPU Design a CPU] - GitHub | ||
Revision as of 14:00, 10 April 2022
16-bit I/O Processor Design
