R32V2020 ALU Arithmetic operations
Revision as of 12:06, 10 April 2022 by Blwikiadmin (talk | contribs) (→Effects on the Condition Code Register (CCR))
- Add
- Multiply (18-bits native in FPGA)
- Subtract
Effects on the Condition Code Register (CCR)
- Arithmetic operations affect the
Condition Code Register
- Arithmetic operations set or clear the appropriate bits depending on the result of the operation
