Difference between revisions of "SIMPLE-6502"
Jump to navigation
Jump to search
Blwikiadmin (talk | contribs) |
Blwikiadmin (talk | contribs) (→Clock) |
||
(141 intermediate revisions by the same user not shown) | |||
Line 1: | Line 1: | ||
− | [[FILE: | + | [[FILE:SIMPLE-6502_P1090254-720pxV.jpg]] |
+ | |||
+ | <video type="youtube">p5mwMwwM-R0</video> | ||
== Features == | == Features == | ||
* Build of [http://searle.x10host.com/6502/Simple6502.html Grant Searles's Simple 6502 CPU] | * Build of [http://searle.x10host.com/6502/Simple6502.html Grant Searles's Simple 6502 CPU] | ||
− | ** Runs OSI BASIC | + | ** Runs Microsoft (OSI) BASIC |
− | * 6502 CPU | + | * [https://github.com/land-boards/lb-boards/blob/master/RetroCPUs/SIMPLE-6502/PARTS/R65C02P3_Datasheet.pdf 65C02 CPU] |
− | * 32KB SRAM | + | * 0.9216 or 1.8432 MHz clock - jumper selectable |
− | * EPROM/EEPROM | + | * [https://github.com/land-boards/lb-boards/blob/master/RetroCPUs/SIMPLE-6502/PARTS/AS6C62256_23_March_2016_rev1_2-1288423.pdf 32KB SRAM] |
− | * 68B50 Serial Port (ACIA) | + | * 16KB EPROM/EEPROM |
− | ** RS-232 port | + | ** Using 1/2 of [https://github.com/land-boards/lb-boards/blob/master/RetroCPUs/SIMPLE-6502/PARTS/SST27SF256.pdf SST27SF256] - 32KB Flash Memory |
+ | * [https://github.com/land-boards/lb-boards/blob/master/RetroCPUs/SIMPLE-6502/PARTS/MC68B50_43633.pdf 68B50 Serial Port (ACIA)] | ||
+ | ** [https://github.com/land-boards/lb-boards/blob/master/RetroCPUs/SIMPLE-6502/PARTS/max232.pdf MAX232] RS-232 port or | ||
** Header for FTDI | ** Header for FTDI | ||
− | * Reset switch with optional Power Supervisor | + | ** 115,200 baud |
+ | * Reset switch with optional [https://github.com/land-boards/lb-boards/blob/master/RetroCPUs/SIMPLE-6502/PARTS/ds1813-maxim%20integrated%20products_1178753.pdf DS1813 5V Power Supervisor] | ||
* 95x95mm card | * 95x95mm card | ||
* (4) 6-32 mounting holes | * (4) 6-32 mounting holes | ||
− | == Headers == | + | === Memory Map === |
+ | |||
+ | * 0x0000-0x7FFF 32KB SRAM | ||
+ | * 0x8000-0x9FFF Free Space (8KB) | ||
+ | * 0xA000-0xBFFF Serial (ACIA) | ||
+ | * 0xC000-0xCFFF 16KB EPROM | ||
+ | |||
+ | === Chip Set === | ||
+ | |||
+ | * [https://www.ebay.com/itm/114007713791 Ordered from Ebay] | ||
+ | |||
+ | [[file:LB_65C02_PARTS.jpg]] | ||
+ | |||
+ | * Used these parts: | ||
+ | |||
+ | [[file:SIMPLE-6502_P1090155-720px.jpg]] | ||
+ | |||
+ | === References === | ||
+ | |||
+ | * [http://searle.x10host.com/6502/Simple6502.html Grant Searles's Simple 6502 CPU] - This build | ||
+ | * [http://6502.org/ 6502.org] | ||
+ | ** [http://6502.org/homebuilt Example builds] | ||
+ | ** [http://6502.org/source/ Source Code Repository] | ||
+ | ** [http://6502.org/documents Datasheets] | ||
+ | * [http://wilsonminesco.com/6502primer/ 6502 PRIMER: Building your own 6502 computer] - Great resource with a lot of design information | ||
+ | * [https://blog.adafruit.com/2012/05/10/build-your-own-6502-computer/ Build Your Own 6502 Computer] | ||
+ | |||
+ | == Design == | ||
+ | |||
+ | * CPU | ||
+ | |||
+ | [[file:U5_CPU_6502.PNG]] | ||
+ | |||
+ | * EPROM/EPROM | ||
+ | |||
+ | [[file:U4_EEPROM.PNG]] | ||
+ | |||
+ | * SRAM | ||
+ | |||
+ | [[file:U2_SRAM.PNG]] | ||
+ | |||
+ | * Clock (Rev 1) | ||
+ | |||
+ | [[file:U7_U8_CLOCK.PNG]] | ||
+ | |||
+ | * Clock (Rev 2) | ||
+ | |||
+ | [[file:U7_U8_CLOCK_v2.PNG]] | ||
+ | |||
+ | * UART | ||
+ | |||
+ | [[file:U1_U3_UART.PNG]] | ||
+ | |||
+ | * FTDI | ||
+ | ** Does not match Grant's pinout | ||
+ | |||
+ | [[file:J3_FTDI.PNG]] | ||
+ | |||
+ | == Headers / Connectors == | ||
+ | |||
+ | [[file:SIMPLE-6502_REV1_CAD.PNG]] | ||
+ | |||
+ | === J1 - RS-232 Serial === | ||
+ | |||
+ | * DB-9 Male | ||
+ | * Matches Grant's pinout | ||
+ | * Pinout | ||
+ | |||
+ | # N/C | ||
+ | # Receive | ||
+ | # Transmit | ||
+ | # Loop to pin 6 | ||
+ | # GND | ||
+ | # Loop to pin 4 | ||
+ | # RTS | ||
+ | # N/C | ||
+ | # N/C | ||
+ | |||
+ | === J2 - Speed Select Jumper === | ||
+ | |||
+ | * 1-2 - 0.92 MHz | ||
+ | * 2-3 = 1.8432 MHz | ||
+ | |||
+ | === J3 - FTDI / TTL Serial === | ||
+ | |||
+ | * Requires a FTDI cross-over cable | ||
+ | |||
+ | [[FILE:SIMPLE-6502_J3_FTDI.PNG]] | ||
+ | |||
+ | # GND | ||
+ | # RTS* (out) | ||
+ | # +5V | ||
+ | # Receive (in) | ||
+ | # Transmit (out) | ||
+ | # N/C | ||
+ | |||
+ | === J4 - 5V Power === | ||
+ | |||
+ | * 2x4 header | ||
+ | |||
+ | [[FILE:J4_PWR-5V.PNG]] | ||
+ | |||
+ | === J5 / J6 - EPROM/EEPROM Select Jumpers === | ||
+ | |||
+ | [[FILE:SIMPLE-6502_J5_J6.PNG]] | ||
+ | |||
+ | * J5 - EPROM Pin 1 jumper | ||
+ | ** 1-2 for 28C64, 28C256 (Pull WE to VCC) | ||
+ | ** 2-3 for 27256, 27SF256, 27512 (Pull A14 to GND) | ||
+ | * J6 - EPROM Pin 27 jumper | ||
+ | ** GND (2-3) | ||
+ | |||
+ | ==== EEPROM Pin Table ==== | ||
+ | |||
+ | {| class="wikitable" | ||
+ | ! 27512 | ||
+ | ! 27256 | ||
+ | ! 27SF256 | ||
+ | ! 28C256 | ||
+ | ! 27128 | ||
+ | ! 2764 | ||
+ | ! 28C64 | ||
+ | ! PIN | ||
+ | ! | ||
+ | ! PIN | ||
+ | ! 2764 | ||
+ | ! 28C64 | ||
+ | ! 27128 | ||
+ | ! 28C256 | ||
+ | ! 27SF256 | ||
+ | ! 27256 | ||
+ | ! 27512 | ||
+ | |- | ||
+ | | A15 | ||
+ | | VPP | ||
+ | | VPP | ||
+ | | A14 | ||
+ | | VPP | ||
+ | | VPP | ||
+ | | N/C | ||
+ | | 1 | ||
+ | | | ||
+ | | 28 | ||
+ | | VCC | ||
+ | | VCC | ||
+ | | VCC | ||
+ | | VCC | ||
+ | | VCC | ||
+ | | VCC | ||
+ | | VCC | ||
+ | |- | ||
+ | | A12 | ||
+ | | A12 | ||
+ | | A12 | ||
+ | | A12 | ||
+ | | A12 | ||
+ | | A12 | ||
+ | | A12 | ||
+ | | 2 | ||
+ | | | ||
+ | | 27 | ||
+ | | PGM | ||
+ | | WE* | ||
+ | | PGM | ||
+ | | WE* | ||
+ | | A14 | ||
+ | | A14 | ||
+ | | A14 | ||
+ | |- | ||
+ | | A7 | ||
+ | | A7 | ||
+ | | A7 | ||
+ | | A7 | ||
+ | | A7 | ||
+ | | A7 | ||
+ | | A7 | ||
+ | | 3 | ||
+ | | | ||
+ | | 26 | ||
+ | | A13 | ||
+ | | N/C | ||
+ | | A13 | ||
+ | | A13 | ||
+ | | A13 | ||
+ | | A13 | ||
+ | | A13 | ||
+ | |- | ||
+ | | A6 | ||
+ | | A6 | ||
+ | | A6 | ||
+ | | A6 | ||
+ | | A6 | ||
+ | | A6 | ||
+ | | A6 | ||
+ | | 4 | ||
+ | | | ||
+ | | 25 | ||
+ | | A8 | ||
+ | | A8 | ||
+ | | A8 | ||
+ | | A8 | ||
+ | | A8 | ||
+ | | A8 | ||
+ | | A8 | ||
+ | |- | ||
+ | | A5 | ||
+ | | A5 | ||
+ | | A5 | ||
+ | | A5 | ||
+ | | A5 | ||
+ | | A5 | ||
+ | | A5 | ||
+ | | 5 | ||
+ | | | ||
+ | | 24 | ||
+ | | A9 | ||
+ | | A9 | ||
+ | | A9 | ||
+ | | A9 | ||
+ | | A9 | ||
+ | | A9 | ||
+ | | A9 | ||
+ | |- | ||
+ | | A4 | ||
+ | | A4 | ||
+ | | A4 | ||
+ | | A4 | ||
+ | | A4 | ||
+ | | A4 | ||
+ | | A4 | ||
+ | | 6 | ||
+ | | | ||
+ | | 23 | ||
+ | | A11 | ||
+ | | A11 | ||
+ | | A11 | ||
+ | | A11 | ||
+ | | A11 | ||
+ | | A11 | ||
+ | | A11 | ||
+ | |- | ||
+ | | A3 | ||
+ | | A3 | ||
+ | | A3 | ||
+ | | A3 | ||
+ | | A3 | ||
+ | | A3 | ||
+ | | A3 | ||
+ | | 7 | ||
+ | | | ||
+ | | 22 | ||
+ | | OE* | ||
+ | | OE* | ||
+ | | OE* | ||
+ | | OE* | ||
+ | | OE* | ||
+ | | OE* | ||
+ | | OE* | ||
+ | |- | ||
+ | | A2 | ||
+ | | A2 | ||
+ | | A2 | ||
+ | | A2 | ||
+ | | A2 | ||
+ | | A2 | ||
+ | | A2 | ||
+ | | 8 | ||
+ | | | ||
+ | | 21 | ||
+ | | A10 | ||
+ | | A10 | ||
+ | | A10 | ||
+ | | A10 | ||
+ | | A10 | ||
+ | | A10 | ||
+ | | A10 | ||
+ | |- | ||
+ | | A1 | ||
+ | | A1 | ||
+ | | A1 | ||
+ | | A1 | ||
+ | | A1 | ||
+ | | A1 | ||
+ | | A1 | ||
+ | | 9 | ||
+ | | | ||
+ | | 20 | ||
+ | | CE* | ||
+ | | CE* | ||
+ | | CE* | ||
+ | | CE* | ||
+ | | CE* | ||
+ | | CE* | ||
+ | | CE* | ||
+ | |- | ||
+ | | A0 | ||
+ | | A0 | ||
+ | | A0 | ||
+ | | A0 | ||
+ | | A0 | ||
+ | | A0 | ||
+ | | A0 | ||
+ | | 10 | ||
+ | | | ||
+ | | 19 | ||
+ | | D7 | ||
+ | | D7 | ||
+ | | D7 | ||
+ | | D7 | ||
+ | | D7 | ||
+ | | D7 | ||
+ | | D7 | ||
+ | |- | ||
+ | | D0 | ||
+ | | D0 | ||
+ | | D0 | ||
+ | | D0 | ||
+ | | D0 | ||
+ | | D0 | ||
+ | | D0 | ||
+ | | 11 | ||
+ | | | ||
+ | | 18 | ||
+ | | D6 | ||
+ | | D6 | ||
+ | | D6 | ||
+ | | D6 | ||
+ | | D6 | ||
+ | | D6 | ||
+ | | D6 | ||
+ | |- | ||
+ | | D1 | ||
+ | | D1 | ||
+ | | D1 | ||
+ | | D1 | ||
+ | | D1 | ||
+ | | D1 | ||
+ | | D1 | ||
+ | | 12 | ||
+ | | | ||
+ | | 17 | ||
+ | | D5 | ||
+ | | D5 | ||
+ | | D5 | ||
+ | | D5 | ||
+ | | D5 | ||
+ | | D5 | ||
+ | | D5 | ||
+ | |- | ||
+ | | D2 | ||
+ | | D2 | ||
+ | | D2 | ||
+ | | D2 | ||
+ | | D2 | ||
+ | | D2 | ||
+ | | D2 | ||
+ | | 13 | ||
+ | | | ||
+ | | 16 | ||
+ | | D4 | ||
+ | | D4 | ||
+ | | D4 | ||
+ | | D4 | ||
+ | | D4 | ||
+ | | D4 | ||
+ | | D4 | ||
+ | |- | ||
+ | | GND | ||
+ | | GND | ||
+ | | GND | ||
+ | | GND | ||
+ | | GND | ||
+ | | GND | ||
+ | | GND | ||
+ | | 14 | ||
+ | | | ||
+ | | 15 | ||
+ | | D3 | ||
+ | | D3 | ||
+ | | D3 | ||
+ | | D3 | ||
+ | | D3 | ||
+ | | D3 | ||
+ | | D3 | ||
+ | |- | ||
+ | |} | ||
+ | |||
+ | === JP1 - CPU Pin 1 === | ||
+ | |||
+ | * Install if CPU is not a WDC 65C02 or WDC 65C816 | ||
+ | |||
+ | == Software == | ||
+ | |||
+ | * [http://searle.x10host.com/6502/osi_bas.zip Link to Grant's files] | ||
+ | * Source code | ||
+ | ** osi_bas.s <== the Microsoft OSI BASIC and I/O routines SOURCE all in a single file | ||
+ | ** Grant's I/O routines are at the end of it | ||
+ | * Files to allow the source to be assembled on a Windows based machine | ||
+ | ** assemble.bat <== double click to assemble osi_bas.s and link to binary file "osi_bas.bin" | ||
+ | ** This should be exactly 16K | ||
+ | ** osi_bas.cfg <== configuration file for the linker (ensure ORG and entries in this file match if you change any) | ||
+ | ** ca65.exe <== the assembler from the cc65 package. Use this. The new version on the cc65 site crashes! | ||
+ | ** ld65.exe <== linker from the cc65 package | ||
+ | * Output files | ||
+ | ** osi_bas.bin <== the ROM fine in pure binary | ||
+ | ** osi_bas.lst <== Assembly listing file | ||
+ | ** rom.hex <== the ROM fine in standard INTEL-HEX format | ||
+ | * To allow simple re-assembly, extract all files to the same folder | ||
+ | ** Freeware utilities are available to convert the "bin" file to HEX or s19 (etc) - use your internet search tool to find | ||
+ | * All source code, assembler binaries and the HEX dump of the ROM is [http://searle.x10host.com/6502/osi_bas.zip here] | ||
+ | ** It is in standard INTEL-HEX format for uploading to a suitable programmer. | ||
+ | |||
+ | == First Unit Checkout == | ||
+ | |||
+ | [[FILE:SIMPLE-6502_P1090185-720PX.jpg]] | ||
+ | |||
+ | === Install Sockets === | ||
+ | |||
+ | * Machined pin sockets | ||
+ | |||
+ | [[file:SIMPLE-6502_P1090153-720px.jpg]] | ||
− | === | + | === Install Passives === |
− | == | + | [[file:SIMPLE-6502_P1090159-720px.jpg]] |
+ | |||
+ | === Power === | ||
+ | |||
+ | * Install 2x4 at J4 | ||
+ | * Power card via J4 with 5V | ||
+ | * Check power pins on parts | ||
+ | |||
+ | === Clock === | ||
+ | |||
+ | * Install Clock parts | ||
+ | ** Did not have 270 pF cap, used 220 pF | ||
+ | ** U7 (74HC04) | ||
+ | ** Y1 1.8432 MHz crystal | ||
+ | ** Clock "doubling" with 74HC04 part | ||
+ | ** Worse with 74HC14 | ||
+ | ** Switched to 74LS04 - works well | ||
+ | * Install clock divider | ||
+ | ** U8 (74HC74) | ||
+ | * Check clocks at J2 | ||
+ | ** Pin 1 s/b 0.9216 MHz | ||
+ | ** Pin 3 s/b 1.8432 MHz | ||
+ | ** Outputs are OK | ||
+ | * Need to change P/L and S/S to 74LS04 | ||
+ | |||
+ | [[FILE:SIMPLE-6502_CLK.png]] | ||
+ | |||
+ | * Clock does not start up reliably | ||
+ | * Replaced part values with Fig 1d [https://www.changpuak.ch/electronics/datasheets/an12fa.pdf AN12 Circuit Techniques for Clock Sources] | ||
+ | |||
+ | [[FILE:AN12_Fig_1d.PNG]] | ||
+ | |||
+ | * Used 1nF cap instead of 1200pF | ||
+ | * Starts reliably but has a glitch | ||
+ | ** Seems to run OK | ||
+ | ** Reset is weird, sometimes does not boot and takes a couple of presses | ||
+ | ** Not sure if this is clock related | ||
+ | * Order new 74LS04 parts | ||
+ | * Rev 2 updates | ||
+ | |||
+ | [[File:U7_U8_CLOCK_v2.PNG]] | ||
+ | |||
+ | === Reset === | ||
+ | |||
+ | * Install U9 | ||
+ | * Install pushbutton switch SW1 | ||
+ | * Reset button gets stretched by Power Monitor U9 | ||
+ | * Measure at 6502 U5 pin 40 | ||
+ | * Falling edge scope cap | ||
+ | |||
+ | [[file:SIMPLE-6502_RESET-FALLING.png]] | ||
+ | |||
+ | * Rising edge scope cap | ||
+ | |||
+ | [[file:SIMPLE-6502_RESET-RISING.png]] | ||
+ | |||
+ | * Switch failed, replaced - works | ||
+ | |||
+ | === EPROM === | ||
+ | |||
+ | * SST27C256 EEPROM | ||
+ | ** 32 KB part | ||
+ | ** Using first 16KB of EEPROM | ||
+ | ** J5 EEPROM pin 1 = VPP = VCC or GND | ||
+ | *** Jumper J5:2-3 | ||
+ | ** J6 EEPROM pin 27 = A14 = GND | ||
+ | *** Jumper J6:2-3 | ||
+ | * U1 - Do not install MAX232 | ||
+ | ** Use FTDI connector with [[FTDI-49MM]] card | ||
+ | * R65C02 CPU | ||
+ | ** Install JP1 on rear of card as wire | ||
+ | |||
+ | ==== EEPROM Programming ==== | ||
+ | |||
+ | * Program using [[TL866ii_Plus_Programmer|TL-866ii plus programmer]] | ||
+ | * File = [https://github.com/land-boards/lb-boards/blob/master/RetroCPUs/SIMPLE-6502/SOFTWARE/ROM.HEX ROM.hex] | ||
+ | * Got Device ID error | ||
+ | * Turn off ID check | ||
+ | |||
+ | [[file:SIMPLE-6502_TL866Plus_Program.png]] | ||
+ | |||
+ | * Device programmed/verified | ||
+ | |||
+ | === Install CPU, ROM, RAM, ACIA === | ||
+ | |||
+ | * Do not install MAX232 yet | ||
+ | ** Use FTDI connector with [[FTDI-49MM]] card | ||
+ | |||
+ | === Test FTDI Serial === | ||
+ | |||
+ | * Wiring is '''not''' 1:1 to [[FTDI-49MM]] | ||
+ | * Wire FTDI J3 to [[FTDI-49MM]] card | ||
+ | ** [[FTDI-49MM]] GND pin 1 to J3-1 RX on card | ||
+ | ** [[FTDI-49MM]] VCC pin 3 to J3-3 RX on card | ||
+ | ** [[FTDI-49MM]] TX pin 4 on to J3-5 RX on card | ||
+ | ** [[FTDI-49MM]] RX pin 5 on to J3-4 TX on card | ||
+ | ** [[FTDI-49MM]] CTS(in) pin 2 to J3-6 CTS on card | ||
+ | * Hardware handshake doesn't work with [[FTDI-49MM]] card | ||
+ | |||
+ | === Card Without MAX232 === | ||
+ | |||
+ | * With DB-9 connector | ||
+ | * Install DB-9 Male | ||
+ | * Holes don't line up well, but 4-40 screws can fit | ||
+ | * Without MAX232 | ||
+ | |||
+ | [[file:SIMPLE-6502_P1090254-720pxV.jpg]] | ||
+ | |||
+ | === Built Card === | ||
+ | |||
+ | * With MAX232 | ||
+ | * Connected to [[FTDI-49MM]] and [[DCE]] cards | ||
+ | ** [[FTDI-49MM]] and [[DCE]] cards wired together | ||
+ | ** [[DCE]] has female DB-9 | ||
+ | ** Separate power cable J2 on [[FTDI-49MM]] to J3 on card | ||
+ | |||
+ | [[FILE:FTDI_DCE_P1090192-720PXV.jpg]] | ||
+ | |||
+ | [[file:SIMPLE-6502_P1090192-720px.jpg]] | ||
+ | |||
+ | * DB-9 connectors connected together | ||
+ | |||
+ | [[file:SIMPLE-6502_P1090191-720px.jpg]] | ||
+ | |||
+ | * Works | ||
+ | |||
+ | [[file:SIMPLE-6502_Booting.png]] | ||
+ | |||
+ | == Performance == | ||
+ | |||
+ | * TeraTerm settings | ||
+ | |||
+ | [[file:SIMPLE-6809_TeraTerm_Setup.PNG]] | ||
+ | |||
+ | * Test software | ||
+ | |||
+ | <pre> | ||
+ | 10 FOR I =1 TO 10000 | ||
+ | 20 PRINT I | ||
+ | 30 NEXT I | ||
+ | |||
+ | </pre> | ||
+ | |||
+ | * Time ~38 secs | ||
== Mechanicals == | == Mechanicals == | ||
Line 27: | Line 595: | ||
== Assembly Sheet == | == Assembly Sheet == | ||
− | [[SIMPLE-6502 Rev 1 Assembly Sheet]] | + | === Assembly Sheet Rev 2 === |
+ | |||
+ | * [http://land-boards.com/SIMPLE-6502/SIMPLE-6502_Rev2_ibom.html SIMPLE-6502 Rev 2 Interactive BOM] | ||
+ | |||
+ | === Assembly Sheet Rev 1 === | ||
+ | |||
+ | * [[SIMPLE-6502 Rev 1 Assembly Sheet]] | ||
+ | * [http://land-boards.com/SIMPLE-6502/SIMPLE-6502_Rev1_ibom.html SIMPLE-6502 Rev 1 Interactive BOM] |
Latest revision as of 20:21, 10 September 2023
Contents
Features
- Build of Grant Searles's Simple 6502 CPU
- Runs Microsoft (OSI) BASIC
- 65C02 CPU
- 0.9216 or 1.8432 MHz clock - jumper selectable
- 32KB SRAM
- 16KB EPROM/EEPROM
- Using 1/2 of SST27SF256 - 32KB Flash Memory
- 68B50 Serial Port (ACIA)
- MAX232 RS-232 port or
- Header for FTDI
- 115,200 baud
- Reset switch with optional DS1813 5V Power Supervisor
- 95x95mm card
- (4) 6-32 mounting holes
Memory Map
- 0x0000-0x7FFF 32KB SRAM
- 0x8000-0x9FFF Free Space (8KB)
- 0xA000-0xBFFF Serial (ACIA)
- 0xC000-0xCFFF 16KB EPROM
Chip Set
- Used these parts:
References
- Grant Searles's Simple 6502 CPU - This build
- 6502.org
- 6502 PRIMER: Building your own 6502 computer - Great resource with a lot of design information
- Build Your Own 6502 Computer
Design
- CPU
- EPROM/EPROM
- SRAM
- Clock (Rev 1)
- Clock (Rev 2)
- UART
- FTDI
- Does not match Grant's pinout
Headers / Connectors
J1 - RS-232 Serial
- DB-9 Male
- Matches Grant's pinout
- Pinout
- N/C
- Receive
- Transmit
- Loop to pin 6
- GND
- Loop to pin 4
- RTS
- N/C
- N/C
J2 - Speed Select Jumper
- 1-2 - 0.92 MHz
- 2-3 = 1.8432 MHz
J3 - FTDI / TTL Serial
- Requires a FTDI cross-over cable
- GND
- RTS* (out)
- +5V
- Receive (in)
- Transmit (out)
- N/C
J4 - 5V Power
- 2x4 header
J5 / J6 - EPROM/EEPROM Select Jumpers
- J5 - EPROM Pin 1 jumper
- 1-2 for 28C64, 28C256 (Pull WE to VCC)
- 2-3 for 27256, 27SF256, 27512 (Pull A14 to GND)
- J6 - EPROM Pin 27 jumper
- GND (2-3)
EEPROM Pin Table
27512 | 27256 | 27SF256 | 28C256 | 27128 | 2764 | 28C64 | PIN | PIN | 2764 | 28C64 | 27128 | 28C256 | 27SF256 | 27256 | 27512 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
A15 | VPP | VPP | A14 | VPP | VPP | N/C | 1 | 28 | VCC | VCC | VCC | VCC | VCC | VCC | VCC | |
A12 | A12 | A12 | A12 | A12 | A12 | A12 | 2 | 27 | PGM | WE* | PGM | WE* | A14 | A14 | A14 | |
A7 | A7 | A7 | A7 | A7 | A7 | A7 | 3 | 26 | A13 | N/C | A13 | A13 | A13 | A13 | A13 | |
A6 | A6 | A6 | A6 | A6 | A6 | A6 | 4 | 25 | A8 | A8 | A8 | A8 | A8 | A8 | A8 | |
A5 | A5 | A5 | A5 | A5 | A5 | A5 | 5 | 24 | A9 | A9 | A9 | A9 | A9 | A9 | A9 | |
A4 | A4 | A4 | A4 | A4 | A4 | A4 | 6 | 23 | A11 | A11 | A11 | A11 | A11 | A11 | A11 | |
A3 | A3 | A3 | A3 | A3 | A3 | A3 | 7 | 22 | OE* | OE* | OE* | OE* | OE* | OE* | OE* | |
A2 | A2 | A2 | A2 | A2 | A2 | A2 | 8 | 21 | A10 | A10 | A10 | A10 | A10 | A10 | A10 | |
A1 | A1 | A1 | A1 | A1 | A1 | A1 | 9 | 20 | CE* | CE* | CE* | CE* | CE* | CE* | CE* | |
A0 | A0 | A0 | A0 | A0 | A0 | A0 | 10 | 19 | D7 | D7 | D7 | D7 | D7 | D7 | D7 | |
D0 | D0 | D0 | D0 | D0 | D0 | D0 | 11 | 18 | D6 | D6 | D6 | D6 | D6 | D6 | D6 | |
D1 | D1 | D1 | D1 | D1 | D1 | D1 | 12 | 17 | D5 | D5 | D5 | D5 | D5 | D5 | D5 | |
D2 | D2 | D2 | D2 | D2 | D2 | D2 | 13 | 16 | D4 | D4 | D4 | D4 | D4 | D4 | D4 | |
GND | GND | GND | GND | GND | GND | GND | 14 | 15 | D3 | D3 | D3 | D3 | D3 | D3 | D3 |
JP1 - CPU Pin 1
- Install if CPU is not a WDC 65C02 or WDC 65C816
Software
- Link to Grant's files
- Source code
- osi_bas.s <== the Microsoft OSI BASIC and I/O routines SOURCE all in a single file
- Grant's I/O routines are at the end of it
- Files to allow the source to be assembled on a Windows based machine
- assemble.bat <== double click to assemble osi_bas.s and link to binary file "osi_bas.bin"
- This should be exactly 16K
- osi_bas.cfg <== configuration file for the linker (ensure ORG and entries in this file match if you change any)
- ca65.exe <== the assembler from the cc65 package. Use this. The new version on the cc65 site crashes!
- ld65.exe <== linker from the cc65 package
- Output files
- osi_bas.bin <== the ROM fine in pure binary
- osi_bas.lst <== Assembly listing file
- rom.hex <== the ROM fine in standard INTEL-HEX format
- To allow simple re-assembly, extract all files to the same folder
- Freeware utilities are available to convert the "bin" file to HEX or s19 (etc) - use your internet search tool to find
- All source code, assembler binaries and the HEX dump of the ROM is here
- It is in standard INTEL-HEX format for uploading to a suitable programmer.
First Unit Checkout
Install Sockets
- Machined pin sockets
Install Passives
Power
- Install 2x4 at J4
- Power card via J4 with 5V
- Check power pins on parts
Clock
- Install Clock parts
- Did not have 270 pF cap, used 220 pF
- U7 (74HC04)
- Y1 1.8432 MHz crystal
- Clock "doubling" with 74HC04 part
- Worse with 74HC14
- Switched to 74LS04 - works well
- Install clock divider
- U8 (74HC74)
- Check clocks at J2
- Pin 1 s/b 0.9216 MHz
- Pin 3 s/b 1.8432 MHz
- Outputs are OK
- Need to change P/L and S/S to 74LS04
- Clock does not start up reliably
- Replaced part values with Fig 1d AN12 Circuit Techniques for Clock Sources
- Used 1nF cap instead of 1200pF
- Starts reliably but has a glitch
- Seems to run OK
- Reset is weird, sometimes does not boot and takes a couple of presses
- Not sure if this is clock related
- Order new 74LS04 parts
- Rev 2 updates
Reset
- Install U9
- Install pushbutton switch SW1
- Reset button gets stretched by Power Monitor U9
- Measure at 6502 U5 pin 40
- Falling edge scope cap
- Rising edge scope cap
- Switch failed, replaced - works
EPROM
- SST27C256 EEPROM
- 32 KB part
- Using first 16KB of EEPROM
- J5 EEPROM pin 1 = VPP = VCC or GND
- Jumper J5:2-3
- J6 EEPROM pin 27 = A14 = GND
- Jumper J6:2-3
- U1 - Do not install MAX232
- Use FTDI connector with FTDI-49MM card
- R65C02 CPU
- Install JP1 on rear of card as wire
EEPROM Programming
- Program using TL-866ii plus programmer
- File = ROM.hex
- Got Device ID error
- Turn off ID check
- Device programmed/verified
Install CPU, ROM, RAM, ACIA
- Do not install MAX232 yet
- Use FTDI connector with FTDI-49MM card
Test FTDI Serial
- Wiring is not 1:1 to FTDI-49MM
- Wire FTDI J3 to FTDI-49MM card
- Hardware handshake doesn't work with FTDI-49MM card
Card Without MAX232
- With DB-9 connector
- Install DB-9 Male
- Holes don't line up well, but 4-40 screws can fit
- Without MAX232
Built Card
- DB-9 connectors connected together
- Works
Performance
- TeraTerm settings
- Test software
10 FOR I =1 TO 10000 20 PRINT I 30 NEXT I
- Time ~38 secs