Difference between revisions of "IOP16 Register File"
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| Line 24: | Line 24: | ||
** 32 registers | ** 32 registers | ||
* 8 registers | * 8 registers | ||
| − | ** ALMs | + | ** 34 ALMs |
** 64 registers | ** 64 registers | ||
* 16 registers (13 are GP) | * 16 registers (13 are GP) | ||
| − | ** ALMs | + | ** 42 ALMs |
| − | * 104 registers | + | ** 104 registers |
Revision as of 23:49, 17 April 2022
Register File
- Instruction encodes 4-bits for the register number
- Special Purpose Registers hard-coded values
- Register 0x8 has constant value 0x00
- Register 0x9 has constant value 0x01
- Register 0xF has constant value 0xFF
- 4, 8, or 13 General Purpose (GP) Registers
- Registers numbered 0x0-0x7, 0x0A-0xE
- Register count configured by NUM_REGS value in cpu_001.vhd
RegFile : ENTITY work.RegisterFile GENERIC map ( NUM_REGS => 4 -- 4, 8. or 16 )
Resources
- 4 registers
- 19 ALMs
- 32 registers
- 8 registers
- 34 ALMs
- 64 registers
- 16 registers (13 are GP)
- 42 ALMs
- 104 registers
