Difference between revisions of "BBB-GVS-3"
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* (19) GPIOs, GVS pins | * (19) GPIOs, GVS pins | ||
+ | ** GVS pins | ||
* (3) UARTs, GVTxRx pins | * (3) UARTs, GVTxRx pins | ||
+ | ** GVTxRx pins | ||
* (1) I2C bus, GVSdaSck | * (1) I2C bus, GVSdaSck | ||
+ | ** GVSdaSck | ||
* (8) Channels of 3.3V to 5V level translators | * (8) Channels of 3.3V to 5V level translators | ||
− | * Use female to female jumpers to route the GPIO lines to the translator channels | + | ** Use female to female jumpers to route the GPIO lines to the translator channels |
− | * 5V side has GVS pins | + | ** 5V side has GVS pins |
* (7) 1.8V analog GVS connections with analog voltage/ground | * (7) 1.8V analog GVS connections with analog voltage/ground | ||
− | * Buffer opamps on the analog inputs | + | ** Buffer opamps on the analog inputs |
* 5V pins are all ESD protected pins with 15 kV of protection | * 5V pins are all ESD protected pins with 15 kV of protection | ||
* Selectable 5V source (SYS_5V or VDD_5V) | * Selectable 5V source (SYS_5V or VDD_5V) | ||
+ | LEDs for 3.3V and 5V power | ||
* Cape configuration EEPROM with write enable jumper | * Cape configuration EEPROM with write enable jumper | ||
* Beaglebone Black form factor | * Beaglebone Black form factor |
Revision as of 12:34, 25 January 2020
Features
- (19) GPIOs, GVS pins
- GVS pins
- (3) UARTs, GVTxRx pins
- GVTxRx pins
- (1) I2C bus, GVSdaSck
- GVSdaSck
- (8) Channels of 3.3V to 5V level translators
- Use female to female jumpers to route the GPIO lines to the translator channels
- 5V side has GVS pins
- (7) 1.8V analog GVS connections with analog voltage/ground
- Buffer opamps on the analog inputs
- 5V pins are all ESD protected pins with 15 kV of protection
- Selectable 5V source (SYS_5V or VDD_5V)
LEDs for 3.3V and 5V power
- Cape configuration EEPROM with write enable jumper
- Beaglebone Black form factor