Difference between revisions of "IOP16 Constants Unit"
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== Constants ROM with Address Counter == | == Constants ROM with Address Counter == | ||
+ | |||
+ | A Constants ROM can be used to store strings. This is useful for printing strings to the VDU and UART. | ||
* Constants ROM | * Constants ROM | ||
** 256-byte (max) | ** 256-byte (max) | ||
− | ** Null terminated strings | + | ** Null-terminated strings |
− | ** ROM "assembler" | + | ** ROM "assembler" creates .MIF file and Symbol table |
− | * Address Counter | + | * 8-bit Address Counter |
** Loadable with start address | ** Loadable with start address | ||
** Auto-increment address | ** Auto-increment address | ||
Line 11: | Line 13: | ||
== Programming == | == Programming == | ||
− | * Load start address (W) | + | * Single address from the IOP Peripheral spave |
− | * Read Data | + | * Load transfer start address (W) |
+ | * Read Data (R) | ||
== Hook-up == | == Hook-up == | ||
− | === Pins == | + | * Add to Top Level VHDL code |
+ | |||
+ | === Pins === | ||
+ | |||
+ | * None - all internal | ||
=== Signals === | === Signals === | ||
+ | |||
+ | <pre> | ||
+ | -- Decodes/Strobes | ||
+ | ... | ||
+ | signal w_ldConAdr : std_logic; | ||
+ | signal w_rdConAdr : std_logic; | ||
+ | ... | ||
+ | -- Interfaces | ||
+ | ... | ||
+ | signal w_ConstsData : std_logic_vector(7 downto 0); | ||
+ | </pre> | ||
=== VHDL Instance === | === VHDL Instance === | ||
+ | |||
+ | * Add this entity instance code to the IOP16 top file | ||
+ | |||
+ | <pre> | ||
+ | -- Constants Unit | ||
+ | CONST_UNIT : entity work.ConstantsUnit | ||
+ | port map ( | ||
+ | i_clock => i_clk, -- 50 MHz clock | ||
+ | i_dataIn => w_periphOut, -- Data from IOP CPU | ||
+ | i_ldStr => w_ldConAdr, -- Write load address strobe | ||
+ | i_rdStr => w_rdConAdr, -- Strobe to read data from ROM | ||
+ | o_constData => w_ConstsData -- Data from ROM | ||
+ | ); | ||
+ | </pre> | ||
+ | |||
+ | === Hook-up Strobes/Read Mux === | ||
+ | |||
+ | * Strobes | ||
+ | |||
+ | <pre> | ||
+ | -- Add Strobes/Selects | ||
+ | .. | ||
+ | w_ldConAdr <= '1' when (w_periphAdr=x"0E") and (w_periphWr = '1') else '0'; | ||
+ | w_rdConAdr <= '1' when (w_periphAdr=x"0E") and (w_periphRd = '1') else '0'; | ||
+ | ... | ||
+ | </pre> | ||
+ | |||
+ | * Add to Read Mux | ||
+ | |||
+ | <pre> | ||
+ | -- Peripheral bus read mux | ||
+ | w_periphIn <= ... | ||
+ | w_ConstsData when w_periphAdr = x"0E" else -- Read Constants ROM | ||
+ | ... | ||
+ | </pre> | ||
+ | |||
+ | == Constants Compiler == | ||
+ | |||
+ | * Program - [https://github.com/douggilliland/Design_A_CPU/blob/main/Assembler/pyConstants_cpu_001.py pyConstants_cpu_001.py] | ||
+ | ** Python 3 | ||
+ | ** Prompts for input file | ||
+ | * Creates two output files | ||
+ | ** Cross reference list of LABEL, address | ||
+ | ** .MIF file with ROM contents | ||
+ | *** Load ROM file by double-clickjng ConstantsROM_256B below ConstantsUnit | ||
+ | * Input file is CSV | ||
+ | ** Header line - ['LABEL','STRING'] | ||
+ | |||
+ | === Constants Subroutine === | ||
+ | |||
+ | * Routine handles constants | ||
+ | * Sets constants address | ||
+ | * Reads from constants ROM | ||
+ | * Writes to VDU | ||
+ | |||
+ | <pre> | ||
+ | PRSTR IOW 0X01 0X0E LOAD CONSTANTS ADDRESS | ||
+ | PRSTR2 IOR 0X01 0X0E READ CHAR (NEXT) | ||
+ | CMP 0X01 0X00 IS END OF STRING? | ||
+ | BNE SKIPPS NOT END OF STRING | ||
+ | RTS RETURN IF END | ||
+ | SKIPPS JSR WR2VDU PRINT TO VDU | ||
+ | JMP PRSTR2 LOOP UNTIL NULL TERM | ||
+ | </pre> | ||
+ | |||
+ | == Resources == | ||
+ | |||
+ | * Logic Cells: 74 | ||
+ | * Registers: 46 | ||
+ | * Memory Bits: 2048 | ||
+ | * M9Ks: 1 |
Latest revision as of 12:01, 15 April 2022
Contents
Constants ROM with Address Counter
A Constants ROM can be used to store strings. This is useful for printing strings to the VDU and UART.
- Constants ROM
- 256-byte (max)
- Null-terminated strings
- ROM "assembler" creates .MIF file and Symbol table
- 8-bit Address Counter
- Loadable with start address
- Auto-increment address
Programming
- Single address from the IOP Peripheral spave
- Load transfer start address (W)
- Read Data (R)
Hook-up
- Add to Top Level VHDL code
Pins
- None - all internal
Signals
-- Decodes/Strobes ... signal w_ldConAdr : std_logic; signal w_rdConAdr : std_logic; ... -- Interfaces ... signal w_ConstsData : std_logic_vector(7 downto 0);
VHDL Instance
- Add this entity instance code to the IOP16 top file
-- Constants Unit CONST_UNIT : entity work.ConstantsUnit port map ( i_clock => i_clk, -- 50 MHz clock i_dataIn => w_periphOut, -- Data from IOP CPU i_ldStr => w_ldConAdr, -- Write load address strobe i_rdStr => w_rdConAdr, -- Strobe to read data from ROM o_constData => w_ConstsData -- Data from ROM );
Hook-up Strobes/Read Mux
- Strobes
-- Add Strobes/Selects .. w_ldConAdr <= '1' when (w_periphAdr=x"0E") and (w_periphWr = '1') else '0'; w_rdConAdr <= '1' when (w_periphAdr=x"0E") and (w_periphRd = '1') else '0'; ...
- Add to Read Mux
-- Peripheral bus read mux w_periphIn <= ... w_ConstsData when w_periphAdr = x"0E" else -- Read Constants ROM ...
Constants Compiler
- Program - pyConstants_cpu_001.py
- Python 3
- Prompts for input file
- Creates two output files
- Cross reference list of LABEL, address
- .MIF file with ROM contents
- Load ROM file by double-clickjng ConstantsROM_256B below ConstantsUnit
- Input file is CSV
- Header line - ['LABEL','STRING']
Constants Subroutine
- Routine handles constants
- Sets constants address
- Reads from constants ROM
- Writes to VDU
PRSTR IOW 0X01 0X0E LOAD CONSTANTS ADDRESS PRSTR2 IOR 0X01 0X0E READ CHAR (NEXT) CMP 0X01 0X00 IS END OF STRING? BNE SKIPPS NOT END OF STRING RTS RETURN IF END SKIPPS JSR WR2VDU PRINT TO VDU JMP PRSTR2 LOOP UNTIL NULL TERM
Resources
- Logic Cells: 74
- Registers: 46
- Memory Bits: 2048
- M9Ks: 1