Difference between revisions of "QMTECH Cyclone 10CL006 FPGA Card"
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== Programmer == | == Programmer == | ||
| + | |||
| + | * .jic file | ||
| + | * Device EPCQ64 | ||
| + | * Active Serial | ||
[[file:Cyclone10_Gen_Programmer_File.png]] | [[file:Cyclone10_Gen_Programmer_File.png]] | ||
| + | |||
| + | * Adv Options | ||
| + | ** Click first 2 boxes | ||
[[file:Cyclone10_Adv_Opts_Programmer.png]] | [[file:Cyclone10_Adv_Opts_Programmer.png]] | ||
| + | |||
| + | * Programmer | ||
[[file:Cyclone10_Programmer.png]] | [[file:Cyclone10_Programmer.png]] | ||
Revision as of 17:40, 12 April 2022
Contents
Specification
- On-Board FPGA: 10CL006YU256C8G
- On-Board FPGA external crystal frequency: 50MHz
- 10CL006YU256C8G has block RAM resource - 30 of M9K blocks
- 10CL006YU256C8G has 6K LEs
- On-Board 32MB Micron SDRAM，MT48LC16M16A2-75
- On-Board 3.3V power supply for FPGA by using MP2359 wide input range DC/DC
- QM_Cyclone10_10CL006 development board has two 64p, 2.54mm pitch headers for extending user IOs
- QM_Cyclone10_10CL006 development board has 3 user switches
- QM_Cyclone10_10CL006 development board has 2 user LEDs
- QM_Cyclone10_10CL006 development board has JTAG interface, by using 10p, 2.54mm pitch male header
- QM_Cyclone10_10CL006 development board PCB size is: 6.7cm x 8.4cm
- Default power source for board is: 1A@5V DC, the DC header type: DC-050, 5.5mmx2.1mm
- AliExpress listing
Resources
- Comparable to Cyclone IV EP4CE6 FPGA
- 30 1Kx9 RAM blocks
- Power LED - D4 (On when 5V is applied)
- User LED - LED_D5 - FPGA Pin_L9 (pull low to illuminate LED)
- KEY0 - SW1 - FPGA Pin_F3
- RESET_N- SW2 - FPGA PIN_J6
- nCONFIG - SW3 - FPGA PIN_H5
- JP5 - 5V
Connectors
Configuration EEPROM
LEDs
- Power LED - D4 (On when 5V is applied)
- User LED - LED_D5 - FPGA Pin_L9 (pull low to illuminate LED)
Pushbuttons
- KEY0 - SW1 - FPGA Pin_F3
- RESET_N- SW2 - FPGA PIN_J6
- nCONFIG - SW3 - FPGA PIN_H5
SDRAM
U7
U8
Programmer
- .jic file
- Device EPCQ64
- Active Serial
- Adv Options
- Click first 2 boxes
- Programmer
Pin List
set_global_assignment -name FAMILY "Cyclone 10 LP" set_global_assignment -name DEVICE 10CL006YU256C8G set_global_assignment -name TOP_LEVEL_ENTITY uk101_41kRAM set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1" set_global_assignment -name PROJECT_CREATION_TIME_DATE "14:00:12 MARCH 31, 2019" set_global_assignment -name LAST_QUARTUS_VERSION "21.1.0 Lite Edition" set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW" set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)" set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL" # Clock and reset set_location_assignment PIN_E1 -to clk set_location_assignment PIN_J6 -to n_reset set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to n_reset # LEDs # PS/2 set_location_assignment PIN_G1 -to ps2Clk set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ps2Clk set_location_assignment PIN_G2 -to ps2Data set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ps2Data # Serial set_location_assignment PIN_D12 -to fpgaRx set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to fpgaRx set_location_assignment PIN_A10 -to fpgaTx set_location_assignment PIN_B10 -to fpgaRts set_location_assignment PIN_D11 -to fpgaCts # Video set_location_assignment PIN_B12 -to vgaRedLo set_location_assignment PIN_A12 -to vgaRedHi set_location_assignment PIN_B13 -to vgaGrnLo set_location_assignment PIN_A13 -to vgaGrnHi set_location_assignment PIN_B14 -to vgaBluLo set_location_assignment PIN_A14 -to vgaBluHi set_location_assignment PIN_D14 -to vgaHsync set_location_assignment PIN_C14 -to vgaVsync # SD Card set_location_assignment PIN_B16 -to sdCS set_location_assignment PIN_C15 -to sdMISO set_location_assignment PIN_A15 -to sdMOSI set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to sdMISO set_location_assignment PIN_C16 -to sdSCLK # SRAM set_location_assignment PIN_E5 -to n_sRamCS set_location_assignment PIN_A3 -to n_sRamOE set_location_assignment PIN_B7 -to n_sRamWE set_location_assignment PIN_D4 -to sramData[0] set_location_assignment PIN_C6 -to sramData[1] set_location_assignment PIN_B5 -to sramData[2] set_location_assignment PIN_B6 -to sramData[3] set_location_assignment PIN_A5 -to sramData[4] set_location_assignment PIN_D6 -to sramData[5] set_location_assignment PIN_E6 -to sramData[6] set_location_assignment PIN_A2 -to sramData[7] set_location_assignment PIN_B4 -to sramAddress[0] set_location_assignment PIN_B3 -to sramAddress[1] set_location_assignment PIN_D3 -to sramAddress[2] set_location_assignment PIN_B1 -to sramAddress[3] set_location_assignment PIN_D1 -to sramAddress[4] set_location_assignment PIN_C2 -to sramAddress[5] set_location_assignment PIN_F5 -to sramAddress[6] set_location_assignment PIN_C3 -to sramAddress[7] set_location_assignment PIN_A4 -to sramAddress[8] set_location_assignment PIN_A6 -to sramAddress[9] set_location_assignment PIN_A7 -to sramAddress[10] set_location_assignment PIN_C8 -to sramAddress[11] set_location_assignment PIN_C9 -to sramAddress[12] set_location_assignment PIN_A8 -to sramAddress[13] set_location_assignment PIN_A9 -to sramAddress[14] set_location_assignment PIN_E8 -to sramAddress[15] set_location_assignment PIN_B9 -to sramAddress[16] set_location_assignment PIN_B8 -to sramAddress[17] set_location_assignment PIN_D9 -to sramAddress[18] set_location_assignment PIN_D8 -to sramAddress[19] # set_location_assignment PIN_T10 -to IO_PIN[3] set_location_assignment PIN_R10 -to IO_PIN[4] set_location_assignment PIN_T11 -to IO_PIN[5] set_location_assignment PIN_R11 -to IO_PIN[6] set_location_assignment PIN_T12 -to IO_PIN[7] set_location_assignment PIN_R12 -to IO_PIN[8] set_location_assignment PIN_M9 -to IO_PIN[9] set_location_assignment PIN_N9 -to IO_PIN[10] set_location_assignment PIN_P9 -to IO_PIN[11] set_location_assignment PIN_M10 -to IO_PIN[12] set_location_assignment PIN_N11 -to IO_PIN[13] set_location_assignment PIN_P11 -to IO_PIN[14] set_location_assignment PIN_T13 -to IO_PIN[15] set_location_assignment PIN_R13 -to IO_PIN[16] set_location_assignment PIN_T14 -to IO_PIN[17] set_location_assignment PIN_T15 -to IO_PIN[18] set_location_assignment PIN_M11 -to IO_PIN[19] set_location_assignment PIN_N12 -to IO_PIN[20] set_location_assignment PIN_N13 -to IO_PIN[21] set_location_assignment PIN_R14 -to IO_PIN[22] set_location_assignment PIN_P14 -to IO_PIN[23] set_location_assignment PIN_N14 -to IO_PIN[24] set_location_assignment PIN_R16 -to IO_PIN[25] set_location_assignment PIN_P16 -to IO_PIN[26] set_location_assignment PIN_N15 -to IO_PIN[27] set_location_assignment PIN_N16 -to IO_PIN[28] set_location_assignment PIN_M15 -to IO_PIN[29] set_location_assignment PIN_M16 -to IO_PIN[30] set_location_assignment PIN_L15 -to IO_PIN[31] set_location_assignment PIN_L16 -to IO_PIN[32] set_location_assignment PIN_M12 -to IO_PIN[33] set_location_assignment PIN_P15 -to IO_PIN[34] set_location_assignment PIN_L13 -to IO_PIN[35] set_location_assignment PIN_L14 -to IO_PIN[36] set_location_assignment PIN_K15 -to IO_PIN[37] set_location_assignment PIN_K16 -to IO_PIN[38] set_location_assignment PIN_J12 -to IO_PIN[39] set_location_assignment PIN_K12 -to IO_PIN[40] set_location_assignment PIN_J13 -to IO_PIN[41] set_location_assignment PIN_J14 -to IO_PIN[42] set_location_assignment PIN_J11 -to IO_PIN[43] set_location_assignment PIN_K11 -to IO_PIN[44] set_location_assignment PIN_F11 -to IO_PIN[45] set_location_assignment PIN_G11 -to IO_PIN[46] set_location_assignment PIN_F14 -to IO_PIN[47] set_location_assignment PIN_F13 -to IO_PIN[48] # SDRAM set_location_assignment PIN_P2 -to sdRamClk set_location_assignment PIN_R1 -to sdRamClkEn set_location_assignment PIN_M7 -to n_sdRamCas set_location_assignment PIN_P8 -to n_sdRamCe set_location_assignment PIN_M8 -to n_sdRamRas set_location_assignment PIN_P6 -to n_sdRamWe set_location_assignment PIN_R7 -to sdRamAddr[0] set_location_assignment PIN_T7 -to sdRamAddr[1] set_location_assignment PIN_R8 -to sdRamAddr[2] set_location_assignment PIN_T8 -to sdRamAddr[3] set_location_assignment PIN_R6 -to sdRamAddr[4] set_location_assignment PIN_T5 -to sdRamAddr[5] set_location_assignment PIN_R5 -to sdRamAddr[6] set_location_assignment PIN_T4 -to sdRamAddr[7] set_location_assignment PIN_R4 -to sdRamAddr[8] set_location_assignment PIN_T3 -to sdRamAddr[9] set_location_assignment PIN_T6 -to sdRamAddr[10] set_location_assignment PIN_R3 -to sdRamAddr[11] set_location_assignment PIN_T2 -to sdRamAddr[12] set_location_assignment PIN_N8 -to sdRamAddr[13] set_location_assignment PIN_L8 -to sdRamAddr[14] set_location_assignment PIN_K5 -to sdRamData[0] set_location_assignment PIN_L3 -to sdRamData[1] set_location_assignment PIN_L4 -to sdRamData[2] set_location_assignment PIN_K6 -to sdRamData[3] set_location_assignment PIN_N3 -to sdRamData[4] set_location_assignment PIN_M6 -to sdRamData[5] set_location_assignment PIN_P3 -to sdRamData[6] set_location_assignment PIN_N5 -to sdRamData[7] set_location_assignment PIN_N2 -to sdRamData[8] set_location_assignment PIN_N1 -to sdRamData[9] set_location_assignment PIN_L1 -to sdRamData[10] set_location_assignment PIN_L2 -to sdRamData[11] set_location_assignment PIN_K1 -to sdRamData[12] set_location_assignment PIN_K2 -to sdRamData[13] set_location_assignment PIN_J1 -to sdRamData[14] set_location_assignment PIN_J2 -to sdRamData[15]
