Difference between revisions of "SIMPLE-6802"

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# N/C
 
# N/C
 
# N/C
 
# N/C
 +
 +
=== J3 - FTDI / TTL Serial ===
 +
 +
# GND
 +
# RTS* (out)
 +
# +5V
 +
# Receive (in)
 +
# Transmit (out)
 +
# N/C
 +
 +
=== J4 - 5V Power ===
 +
 +
* 2x4 header
  
 
== Mechanicals ==
 
== Mechanicals ==

Revision as of 17:01, 12 September 2022

SIMPLE-6802 REV1 FRONT (BLK).png

Features

  • Build of Grant Searles's Simple 6809 CPU
    • Runs MIKBUG
  • 68B02 CPU
  • 32KB SRAM
  • 16KB EPROM/EEPROM
  • 68B50 Serial Port (ACIA)
    • RS-232 port
    • Header for FTDI
  • Reset switch with optional Power Supervisor
  • 95x95mm card
  • (4) 6-32 mounting holes

Memory Map

  • 0x0000-0x7FFF 32KB SRAM
  • 0x8000-0x9FFF Free Space (8KB)
  • 0xA000-0xBFFF Serial (ACIA)
  • 0xC000-0xCFFF 16KB EPROM

Headers

EPROM/EEPROM Select Jumpers

PART J2 PIN 1 J5 PIN 27
27128 EPROM VPP (5V) PGM (5V)
27C256 EPROM VPP (5V) A14 (GND)
27C512 EPROM A15 (GND) A14 (GND)
SST27SF256 EEPROM VPP (5V) A14 (GND)
SST27SF512 EEPROM A15 (GND) A14 (GND)

Connectors

J1 - RS-232 Serial

  1. N/C
  2. Receive
  3. Transmit
  4. Loop to pin 6
  5. GND
  6. Loop to pin 4
  7. RTS
  8. N/C
  9. N/C

J3 - FTDI / TTL Serial

  1. GND
  2. RTS* (out)
  3. +5V
  4. Receive (in)
  5. Transmit (out)
  6. N/C

J4 - 5V Power

  • 2x4 header

Mechanicals

SIMPLE-6802 REV1 MECHS.PNG

Assembly Sheet

SIMPLE-6802 Rev 1 Assembly Sheet

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