Difference between revisions of "Extend IOP16 minimal example"
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Start by building the [https://github.com/douggilliland/IOP16/tree/main/Higher_Level_Examples/TestIOP16_Minimal minimal example] in Quartus II | Start by building the [https://github.com/douggilliland/IOP16/tree/main/Higher_Level_Examples/TestIOP16_Minimal minimal example] in Quartus II | ||
| + | * This example does not cover porting to a different FPGA card | ||
| + | ** Will need to adjust I/O pin assignments if a different FPGA is used | ||
* Open the Project file in Quartus II | * Open the Project file in Quartus II | ||
| Line 37: | Line 39: | ||
[[file:IOP16_PortingGuide_Entities.PNG]] | [[file:IOP16_PortingGuide_Entities.PNG]] | ||
| − | * | + | * Build FPGA (click the blue "Start Compilation arrow) |
| − | * | + | * Build does not verify the ROM file |
| − | * May need to re-point to the ROM .MIF file since Quartus II sometimes "forgets" | + | ** May need to re-point to the ROM .MIF file since Quartus II sometimes "forgets" |
** Double clicking on the IOP_ROM file | ** Double clicking on the IOP_ROM file | ||
| Line 47: | Line 49: | ||
[[file:IOP16_PortingGuide_ROM_Error.PNG]] | [[file:IOP16_PortingGuide_ROM_Error.PNG]] | ||
| + | |||
| + | * Re-point to the ROM file | ||
| + | * Make sure to select .MIF file extension | ||
| + | |||
| + | [[file:IOP16_PortingGuide_ROM_TestTimer.PNG]] | ||
== Steps == | == Steps == | ||
Revision as of 11:34, 11 April 2022
Contents
Overview
- This is a guide to extending the minimal IOP example by adding IOP16 Peripherals to the minimal design
- This is not the same as Embedding the IOP16 into another design
- This guide requires general familiarity with IOP16 16-bit I/O CPU Design
Clone Sources
- Clone the two repositories to the same directory level since relative paths are used for source files
Alternately download ZIP files
- Alternately you can download the two ZIP files from GitHub
- Unzipped into the same folder
- Rename the folders to remove the -main from the folder path
Build Minimal Example
Start by building the minimal example in Quartus II
- This example does not cover porting to a different FPGA card
- Will need to adjust I/O pin assignments if a different FPGA is used
- Open the Project file in Quartus II
- Entities in Quartus should look like
- Build FPGA (click the blue "Start Compilation arrow)
- Build does not verify the ROM file
- May need to re-point to the ROM .MIF file since Quartus II sometimes "forgets"
- Double clicking on the IOP_ROM file
- Hit finish, if you get error
- Re-point to the ROM file
- Make sure to select .MIF file extension
Steps
- Copy baseline design
- Select/add peripherals
- Create new peripherals
- Write assembly code
Baseline Design
- Starts from IOP example
- Similar to Arduino "Blink Sketch" and uses the resources
- Timer Unit 0 1 second timer
- On-board LED
- The Timer unit could be removed if desired
- Timer makes Blink easier
- Similar to Arduino "Blink Sketch" and uses the resources
- Copy the minimal design to a new folder
