R32V2020 Porting to other FPGAs
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Targeting other FPGAs
- R32V2020 is a 32-bit RISC core specifically targeted at Altera Spartan FPGAs.
- R32V2020 could be targeted to any FPGA that has sufficient Logic Elements and BlockRAM blocks.
Minimum FPGA Resource Requirements
- Minimum FPGA resources are set by these constraints:
- 32-bit data (4 of 1K Blocks in the Spartan FPGAs)
- Three address spaces which use BlockRAM
- Instruction Space
- The Instruction space can be synthesized in logic to reduce RAM requirements
- Data Space
- Stack Space
- Three spaces times four blocks is 12 blocks minimum.
- Peripherals will use some additional blocks.
- Instruction Space
- The Spartan EP4CE6 FPGA has 30 of 1KB blocks.
- Even the smallest Altera EP2 FPGA part has enough BlockRAM for a minimal configuration
Comparison of Lowest end EP2 and EP4 Boards
- These are the lowest end FPGAs in the Spartan II and Spartan IV FPGA families
| Feature | EP2C5 | EP4CE6 | Delta (%) |
|---|---|---|---|
| RAM (bits) | 119808 | 270000 | 125.36% |
| RAM (bytes) | 14976 | 33750 | |
| Logic Elements | 4608 | 6272 | 36.11% |
| LAB | 288 | 392 | 36.11% |
| I/Os | 89 | 91 | |
| Freq (Mhz) | 260 | 200 | |
| Cost (chip/Mouser) | $14.72 | $11.95 | -18.82% |
