Extend IOP16 minimal example

Overview

This is a guide to extending the minimal IOP example by adding IOP16 Peripherals to the minimal design

• This is not the same as Embedding the IOP16 into another design
• This guide requires general familiarity with IOP16 16-bit I/O CPU Design
• This example does not cover porting to a different FPGA card
  • Will need to adjust I/O pin assignments if a different FPGA is used

Baseline Design

Starts from IOP example

• Similar to Arduino "Blink Sketch" and uses the following resources
  • Timer Unit - 1 second timer
    • The Timer unit can be removed if not needed
    • Timer makes Blink easier
  • On-board LED

Steps

• Copy baseline design
• Select/add peripherals
• Create new peripherals
• Write assembly code
• Build/test

Clone Sources

• Clone the two repositories to the same directory level since relative paths are used for source files
  • IOP16 GitHub repository
  • Design a CPU GitHub repository
• Example copies files to TestBuild folder
• There are a lot of extra files in the two unzipped folders (380MB)

Alternately download ZIP files

• Alternately you can download the two ZIP files from GitHub

• Unzip these two folders into the same folder

• Rename the folders to remove the -main from the folder path

• Result

Build Minimal Example

Start by building the minimal example in Quartus II

• Open the Project file (TestIOP16B.qpf) in Quartus II
• Relative path: ..\TestBuild\IOP16\Higher_Level_Examples\TestIOP16_Minimal

• Entities in Quartus should look like

• Build FPGA (click the blue "Start Compilation arrow)

Fix ROM File Path

• Quartus does not verify the ROM file was correct
  • Could be buried in the status messages
  • Likely need to re-point to the ROM .MIF file since Quartus II sometimes "forgets"
  • Double click on the IOP_ROM file

• Hit finish
  • Check for error message

• Re-point to the ROM file
• Make sure to select .MIF file extension

• Build again
• Should be no error messages