LB-6802-01

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Contents

1 Features
2 Memory Map
3 Design
4 Mechanicals
5 Checkout
- 5.1 Rev 1

Features

68B02 CPU
- 1.8432 MHz clock
- MC6802 is fully compatible with MC6800 but without messy two-phase clocking

Memory Map

0x0000-0x7FFF 32KB SRAM
0x8000-0xBFFF Serial (68B50 ACIA)
0xC000-0xFFFF 16KB EPROM

Design

CPU and Power Supervisor/Reset

Oscillator

PLD

PLD Listing

Backplane Connector

Mechanicals

File:LB-6802-011 CAD.PNG

Checkout

Rev 1

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