LB-6802-01

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Revision as of 15:20, 24 August 2024 by Blwikiadmin (talk | contribs) (→‎PLD)
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LB-6802-01 FRONT REV1(BLK).png

Features

  • 68B02 CPU
    • 1.8432 MHz clock
    • MC6802 is fully compatible with MC6800 but without messy two-phase clocking

Memory Map

  • 0x0000-0x7FFF 32KB SRAM
  • 0x8000-0xBFFF Serial (68B50 ACIA)
  • 0xC000-0xFFFF 16KB EPROM

Design

CPU

LB-6802-01 CPU.PNG

Power Supervisor/Reset

LB-6802-01 RESET PWR SUPER.PNG

PLD

LB-6802-01 PLD.PNG

PLD Listing

Backplane Connector

LB-6802-01 BKPL.PNG

Mechanicals

LB-6802-01 CAD Rev1.PNG

Checkout

Rev 1

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