Extend IOP16 minimal example

Overview

• This is a guide to extending the minimal IOP example by adding IOP16 Peripherals to the minimal design
• This is not the same as Embedding the IOP16 into another design
• This guide requires general familiarity with IOP16 16-bit I/O CPU Design

Baseline Design

• Starts from IOP example
  • Similar to Arduino "Blink Sketch" and uses the resources
    • Timer Unit 0 1 second timer
    • On-board LED
  • The Timer unit could be removed if desired
    • Timer makes Blink easier

Steps

• Copy baseline design
• Select/add peripherals
• Create new peripherals
• Write assembly code

Clone Sources

• Clone the two repositories to the same directory level since relative paths are used for source files
  • IOP16 GitHub repository
  • Design a CPU GitHub repository

Alternately download ZIP files

• Alternately you can download the two ZIP files from GitHub

• Unzipped into the same folder

• Rename the folders to remove the -main from the folder path

Build Minimal Example

Start by building the minimal example in Quartus II

• This example does not cover porting to a different FPGA card
  • Will need to adjust I/O pin assignments if a different FPGA is used
• Open the Project file in Quartus II

• Entities in Quartus should look like

• Build FPGA (click the blue "Start Compilation arrow)
• Build does not verify the ROM file
  • May need to re-point to the ROM .MIF file since Quartus II sometimes "forgets"
  • Double clicking on the IOP_ROM file

• Hit finish, if you get error

• Re-point to the ROM file
• Make sure to select .MIF file extension