Difference between revisions of "IOP16 PS/2 Keyboard"

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Line 6: Line 6:
 
=== Software Interface ===
 
=== Software Interface ===
  
==== Register Select = 0  - Status register ====
+
==== Register Select = 0  - Status register (Read only) ====
  
 
* Value = 0x00, No data present
 
* Value = 0x00, No data present
 
* Value = 0x01, Data present
 
* Value = 0x01, Data present
  
==== Register Select = 1  - Data register ====
+
==== Register Select = 1  - Data register (Read only) ====
  
 
* ASCII Data
 
* ASCII Data

Revision as of 12:34, 14 April 2022

PS/2 Keyboard

  • Wrapper for PS/2 keyboard interfaces
  • PS/2 to ASCII conversion

Software Interface

Register Select = 0 - Status register (Read only)

  • Value = 0x00, No data present
  • Value = 0x01, Data present

Register Select = 1 - Data register (Read only)

  • ASCII Data

Hook-up

Pins

-- PS/2 
ps2Clk  : inout std_logic;
ps2Data : inout std_logic;

VHDL Instance

-- PS/2 keyboard/mapper to ANSI
KEYBOARD : ENTITY  WORK.Wrap_Keyboard
port MAP (
  i_CLOCK_50 => i_clk,
  i_n_reset  => w_resetClean_n,
  i_kbCS     => w_kbcs,
  i_RegSel   => w_periphAdr(0),
  i_rd_Kbd   => w_kbcs,
  i_ps2_clk  => ps2Clk,
  i_ps2_data => ps2Data,
  o_kbdDat   => w_KbdData
);

Hook-up

-- Strobes/Selects
  ...
  w_kbcs <= '1' when (w_periphAdr(7 downto 1) = "0000110") and (w_periphRd = '1') else '0';

-- Peripheral bus read mux
  w_periphIn <= ...
    w_KbdData  when w_periphAdr(7 downto 1) = "0000110"	else
  ...

Signals

-- Decodes/Strobes
...
 signal w_kbcs : std_logic;

-- Interfaces
...
  signal w_KbdData  :  std_logic_vector(7 downto 0);

Resources

  • Logic Cells: 708
  • Registers: 95
  • Memory Bits: 0
  • M9Ks: 0