Difference between revisions of "PDP-8 Front Panel"
Jump to navigation
Jump to search
Blwikiadmin (talk | contribs) |
Blwikiadmin (talk | contribs) |
||
Line 33: | Line 33: | ||
== J1 Connector == | == J1 Connector == | ||
− | * 50 pin connector matches [[RETRO-EP4CE15]] Card | + | * 50 pin connector matches [[RETRO-EP4CE15]] Card pins |
** Extra power and ground pins (not on [[RETRO-EP4CE15]] Card) | ** Extra power and ground pins (not on [[RETRO-EP4CE15]] Card) | ||
*** Pins 3,4 = GND | *** Pins 3,4 = GND |
Revision as of 14:31, 18 April 2021
Features
- 12 Value LEDs - octal format
- Display options: PC, Memory Address, Memory Data, Accumulator
- 12 Load Value Slide Switches - octal format
- Enter values: PC, Memory Address, Memory Data, Accumulator
- DISP - Display select pushbutton
- Cycles between PC, Memory Address, Memory Data, Accumulator
- Pushbutton Switches
- STEP pushbutton - Increment PC
- LDPC pushbutton - Load PC from Value Slide Switches
- DEP pushbutton - Store value from Value Slide Switches to memory
- LDA pushbutton - Store value from Value Slide Switches to Accumulator
- RES - Reset pushbutton - Resets CPU
- PB1 - spare
- LNK - Link value slide switch
- 4 DISP LEDs - Cycle between 12 LEDs source with DISP pushbutton
- PC - 12 LEDs display Program Counter value
- PC - 12 LEDs display Memory Address value
- PC - 12 LEDs display Memory Data value
- PC - 12 LEDs display Accumulator value
- LINK LED - Displays Link value
- RUN LED - Running program
- RUN/HALT slide switch
- PWR - Power LED
PDP-8 FPGA Design
- PDP-8 PFGA Design - GitHub repo
J1 Connector
- 50 pin connector matches RETRO-EP4CE15 Card pins
- Extra power and ground pins (not on RETRO-EP4CE15 Card)
- Pins 3,4 = GND
- Pins 5-8 = VCC
- Pin 9 = N/C
- Extra power and ground pins (not on RETRO-EP4CE15 Card)