R32V2020 ALU Arithmetic operations
Revision as of 12:05, 10 April 2022 by Blwikiadmin (talk | contribs) (Created page with "* Add * Multiply ([https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyiv-51004.pdf 18-bits native in FPGA]) * Subtract == Effects on the...")
- Add
- Multiply (18-bits native in FPGA)
- Subtract
Effects on the Condition Code Register (CCR)
- Arithmetic operations affect the
Condition Code Register
- Arithmetic operations set or clear the appropriate bits depending on the result of the operation
