Difference between revisions of "IOP-16 Performance"
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Blwikiadmin (talk | contribs) (Created page with "* High enough IOP-16 Performance - 12.5 MIPS * 4 of 50 MHz FPGA clocks") |
Blwikiadmin (talk | contribs) |
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* High enough IOP-16 Performance - 12.5 MIPS | * High enough IOP-16 Performance - 12.5 MIPS | ||
* 4 of 50 MHz FPGA clocks | * 4 of 50 MHz FPGA clocks | ||
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| + | == Peripheral Strobes == | ||
| + | |||
| + | * 1 clock wide write strobes | ||
| + | * 2 clock wide read strobes | ||
Revision as of 15:47, 19 April 2022
- High enough IOP-16 Performance - 12.5 MIPS
- 4 of 50 MHz FPGA clocks
Peripheral Strobes
- 1 clock wide write strobes
- 2 clock wide read strobes
