Multicomp in a Box

Features

• This is an FPGA card in a box
  • Provides a standardized interface for all FPGA Retrocomputer builds
• Builds
  • 6502
    • OSI BASIC
    • UK101 / OSI C1P
  • 6800
    • MIKBUG
  • 6809
    • BASIC
    • Beal Crook Multiple OS
  • Z80
    • CP/M (various builds)
• 68000
  • Teeside 2 compatible

Enclosure

• YaeCCC Rectangle Project Enclosure Case Electric Junction Box Blue 170mm x 130mm x 80mm / 6.4" x 4.3" x 2.7"

Card Set

• RETRO-EP4CE15 FPGA Baseboard
• QM Tech Cyclone V FPGA Board
• SD CARD X49
• Slide switches card - Using 4 slide switches
• DB25-02 - DB-25
• Power Distribution card
• Reset switch
  • Mounted to front panel
  • On FPGA Pin_N16 (J3-6)
• USB Blaster - Remove from case - Opening in enclosure to access USB connector

QM Tech Cyclone V FPGA Board Features

• QM Tech Cyclone V FPGA Board
• QMTECH Altera Intel FPGA Core Board Cyclone V CycloneV 5CEFA2F23 SDRAM
  • QMTECH GitHub page
  • On-Board FPGA: 5CEFA2F23I7N
  • On-Board FPGA external crystal frequency: 50MHz
  • 5CEFA2F23 has rich RAM resource up to 1,760Kb
  • 5CEFA2F23 has 25K logic cells
  • On-Board Micron MT25QL128A SPI Flash, 16M bytes for user configuration code
  • On-Board Winbond 32MB SDRAM, W9825G6KH-6
  • On-Board 3.3V power supply for FPGA by using MP2315 wide input range DC/DC
  • 5CEFA2F23 core board has two 64p, 2.54mm pitch headers for extending 108 user IOs. All 108 user IOs are precisely designed with length matching
  • 5CEFA2F23 core board has 3 user switches
  • 5CEFA2F23 core board has 2 user LEDs
  • 5CEFA2F23 core board has JTAG interface, by using 10p, 2.54mm pitch header
  • 5CEFA2F23 core board PCB size is: 6.7cm x 8.4cm
  • Default power source for board is: 1A@5V DC, the DC header type: DC-050, 5.5mmx2.1mm

Power

• 5V Power comes from the USB
• 3.3V regulator on the RETRO-EP4CE15 Card
  • H2 pins 2-3 shorted on the RETRO-EP4CE15 card
  • Set to route 3.3V to the I/O connector

Cabling

SD Card

• SD Card
• Install J3 on SD Card
  • Runs card off 3.3V

J1 PIN	SIGNAL	COLOR	SD PIN	FPGA Pin	DIR
2	3.3V	ORG	7	VREG 3.3V	OUT (PWR)
45	sdSCLK	GRY	3	L19	OUT
46	sdMISO	BLU	2	L18	IN
47	sdMOSI	WHT	4	L22	OUT
48	sdCS	VIO	5	M22	OUT
49	GND	GRN	1	GND	OUT (PWR)

DB-25

• DB25-02

GitHub Repository

• GitHub Builds
  • M6502_VGA
  • M6800_MIKBUG_60KB_Banked-1MB
  • M6809_VGA_PS2_IntRAM(56K)
  • M6809_VGA_PS2_RAM(56K)
  • MultiComp_6809_by_Neal_C-2019-04-08
  • Multicomp-MPM
  • TS2_68000
  • UK101_41K
  • UK101_Int_41K