SIMPLE-6502

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CPU-65C02 REV1 FRONT (BLK).png

Features[edit]

  • Build of Grant Searles's Simple 6502 CPU
    • Runs Microsoft (OSI) BASIC
  • 6502 CPU
  • 0.9216 or 1.8432 MHz clock
  • 32KB SRAM
  • 16KB EPROM/EEPROM
  • 68B50 Serial Port (ACIA)
    • RS-232 port
    • Header for FTDI
    • 115,200 baud
  • Reset switch with optional Power Supervisor
  • 95x95mm card
  • (4) 6-32 mounting holes

Memory Map[edit]

  • 0x0000-0x7FFF 32KB SRAM
  • 0x8000-0x9FFF Free Space (8KB)
  • 0xA000-0xBFFF Serial (ACIA)
  • 0xC000-0xCFFF 16KB EPROM

Chip Set[edit]

LB 65C02 PARTS.jpg

References[edit]

Headers / Connectors[edit]

SIMPLE-6502 REV1 CAD.PNG

J1 - RS-232 Serial[edit]

  • DB-9 Male
  • Pinout
  1. N/C
  2. Receive
  3. Transmit
  4. Loop to pin 6
  5. GND
  6. Loop to pin 4
  7. RTS
  8. N/C
  9. N/C

J2 - Speed Select Jumper[edit]

  • 1-2 - 0.92 MHz
  • 2-3 = 1.8432 MHz

J3 - FTDI / TTL Serial[edit]

  1. GND
  2. RTS* (out)
  3. +5V
  4. Receive (in)
  5. Transmit (out)
  6. N/C

J4 - 5V Power[edit]

  • 2x4 header

J5 / J6 - EPROM/EEPROM Select Jumpers[edit]

SIMPLE-6502 J5 J6.PNG

27512 27256 27128 2764 28C64 PIN PIN 2764 28C64 27128 27256 27512
A15 VPP VPP VPP N/C 1 (J5) 28 VCC VCC VCC VCC VCC
A12 A12 A12 A12 A12 2 27 (J6) PGM WE* PGM A14 A14
A7 A7 A7 A7 A7 3 26 A13 N/C A13 A13 A13
A6 A6 A6 A6 A6 4 25 A8 A8 A8 A8
A5 A5 A5 A5 A5 5 24 A9 A9 A9 A9
A4 A4 A4 A4 A4 6 23 A11 A11 A11 A11
A3 A3 A3 A3 A3 7 22 OE* OE* OE* OE*
A2 A2 A2 A2 A2 8 21 A10 A10 A10 A10
A1 A1 A1 A1 A1 9 20 CE* CE* CE* CE*
A0 A0 A0 A0 A0 10 19 D7 D7 D7 D7
D0 D0 D0 D0 D0 11 18 D6 D6 D6 D6
D1 D1 D1 D1 D1 12 17 D5 D5 D5 D5
D2 D2 D2 D2 D2 13 16 D4 D4 D4 D4
GND GND GND GND GND 14 15 D3 D3 D3 D3

JP1 - CPU Pin 1[edit]

  • Install if CPU is not a WDC 65C02 or WDC 65C816

Software[edit]

Mechanicals[edit]

SIMPLE-6502 REV1 MECHS.PNG

Assembly Sheet[edit]

SIMPLE-6502 Rev 1 Assembly Sheet